A wafer level chip packaging method

Abstract

The invention relates to the field of semiconductor device preparation, in particular to a wafer-level chip packaging method. In the wafer-level chip packaging method, bonding materials are arranged on the upper surface of the first wafer and the upper surface of the second wafer, and the bonding material is first subjected to a planarization process, and then the first wafer and the second wafer are The edge of the wafer is subjected to a grinding process, so that the edge stress of the wafer is reduced, so that the warpage becomes smaller, so that there is no crack at the bonding of the first wafer and the second wafer. By changing the order of flattening and grinding, Reduce wafer edge warpage to improve wafer quality.

Description

technical field [0001] The invention relates to the field of semiconductor device preparation, in particular to a wafer-level chip packaging method. Background technique [0002] Wafer-level chip packaging technology is a technology that performs packaging and testing on the entire wafer and then etches a single finished chip. The size of the packaged chip is the same as that of the bare chip. [0003] The difference between wafer-level chip packaging technology and traditional packaging methods is that traditional chip packaging is etched first and then packaged and tested, and after packaging, the size of the original chip is increased by about 20%; Packaging and testing are carried out on the wafer before scribing and dividing. Therefore, the volume after packaging is almost the same as the size of the IC bare chip, which can greatly reduce the size of the IC after packaging. [0004] At present, with the requirement of wafer assembly thickness, the thickness of chip pac...

AI Technical Summary

Problems solved by technology

[0004] At present, with the requirement of wafer assembly thickness, the chip packaging thickness is required to be as thin as possible. When the chip size is small to a certain range, such as less than 600 microns, the thickness of the surface mount process will be more difficult.

At the same time, because silicon is relatively brittle after etching, it is easier to cause problems such as chip chipping and chipping when sucking it directly with a suction nozzle.

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