Memory wafer test method and memory tester

Abstract

The invention provides a memory wafer test method and a memory tester. According to the test method, before wafer probing such as function test is performed, firstly, a simultaneous-test memory chip on a wafer is subjected to grouping short-circuit test; whether the wafer fails or not is judged; the memory tester only starts after the wafer passes the short-circuit test; and the wafer probing is performed, so that the condition that a probe card and the like can be damaged by heavy leakage current of a failed wafer when the tester is directly used for probing on the failed wafer is avoided; meanwhile, a damaged chip can be found and removed as early as possible; the average test time of the wafer test is reduced; and the test cost is reduced. The memory tester provided by the invention is additionally provided with a grouping management unit; the grouping management unit can perform probe grouping on the probe card; and pins of a tested memory chip in the group are grounded for short-circuit test, so that the tester can be protected, and the condition that the probe card and the like can be damaged by great leakage current of the failed wafer when the tester is directly used for probing on the failed wafer is avoided.

Description

technical field [0001] The invention relates to the technical field of semiconductor testing, in particular to a memory wafer testing method and a memory testing machine. Background technique [0002] In 1947, the birth of the first transistor marked the beginning of the semiconductor industry. Since then, semiconductor production and manufacturing technology has become more and more important. In the past, many individual transistors can now be interconnected and processed into a complex integrated circuit form. This is what the semiconductor industry is currently manufacturing. million transistors. Semiconductor circuits were originally manufactured in wafer form. A wafer is a circular silicon chip. On the basis of this semiconductor, many independent individual circuits are established. This single circuit on a wafer is called a die (that is, a chip or a bare chip), and each die is an independent, complete circuit. When the manufacturing process is completed, each die...

AI Technical Summary

Problems solved by technology

However, in the process of using a tester with a high number of simultaneous measurements for wafer probe testing, all the DUTs for the same test are usually powered on at the same time, which can easily lead to excessive wafer leakage of failed chips and damage the probe card of the tester. The root cause of this phenomenon is: during the test process using the high-quality testing machine (KALOS testing machine of the 768 testing machine), since the test channel does not have a power protection circuit, the machine uses the test channel to send power to the wafer. The maximum current of the test power supply provided by the DUT cannot exceed 10mA, and the leakage current in the central area of ​​the leakage wafer will be as high as 45mA (the current of a normal wafer is below 1mA). This ultra-high leakage current will flood into the test channel and eventually damage the test. machine probe card

Images