Multilevel fault tolerance reinforcement satellite information processing system based on SRAM FPGA

Abstract

The invention provides a multilevel fault tolerance reinforcement satellite information processing system based on an SRAM (Static Random Access Memory) FPGA (Field Programmable Gate Array), and relates to satellite information processing. The invention aims at solving the problems that when the SRAM FPGA is used as a satellite information processing system, the system reliability is influenced by single event upset and latch-up effects and the like, and a satellite practical task is not combined with a protection measure. The system is realized through the following modules including a memory module, a checking and control module, a memory configuration module, a state storage Flash module, an IO / BUS module, an anti-latch power supply module and a main processing module, wherein the memory module is used for data storage and program loading of a main processing module; the checking and control module is used for single event upset effect immunization; the memory configuration module is used for storing initial configuration files and remote updating configuration files; the state storage Flash module is used for realizing the data access state; the IO / BUS module is used for realizing communication and control; the anti-latch power supply module is used for system single event latch-up effect protection and power supplying to each module; and the main processing module is used for data processing and satellite event management. The multilevel fault tolerance reinforcement satellite information processing system based on the SRAM FPGA is applied to the technical field of satellites.

Description

technical field [0001] The invention relates to satellite information processing. Background technique [0002] Satellite technology is the embodiment of a country's comprehensive national strength and cutting-edge scientific and technological strength, and has an important impact on the country's military, national defense and economy. The onboard computer system is responsible for completing satellite control and data processing tasks, and is one of the core units of the satellite. In order to adapt to the harsh conditions of the space environment and the limitations of satellites in terms of volume, weight, and power consumption, the performance of the on-board computer system has always lagged far behind that of the ground-based computer system. [0003] The processor is the core component of the computer system. From the 1980s to the beginning of the 21st century, the on-board computer system processor has experienced from the switch controller, to the CPU chip represe...

AI Technical Summary

Problems solved by technology

[0010] The purpose of the present invention is to solve the problem that when using SRAMFPGA as a satellite information processing system, due to single event flipping, latching, etc., which affect the reliability of the system, and the problem that the actual mission of the satellite is not combined with protective measures, and provide a SRAMFPGA-based multi-level fault-tolerant hardened satellite information processing system

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