Tunnel Field Effect Transistor and Manufacturing Method

Abstract

The present invention provides a tunnel field effect transistor and a manufacturing method thereof. The tunnel field effect transistor comprises a substrate; a P-type silylene layer and an N-type silylene layer which form a lamination structure; a grid structure located on the lamination structure; electrodes located on the P-type silylene layer and the N-type silylene layer at the two sides of the grid structure and used for forming a source or a drain with the P-type silylene layer and the N-type silylene layer. The present invention also provides a manufacturing method of the tunnel field effect transistor. The manufacturing method of the tunnel field effect transistor comprises the steps of providing the substrate; forming the P-type silylene layer and the N-type silylene layer to thereby enable the P-type silylene layer and the N-type silylene layer to overlap and contact at the intersection position mutually to form the lamination structure; forming the grid structure on the lamination structure; forming the electrodes on the P-type silylene layer and the N-type silylene layer at the two sides of the grid structure, wherein the electrodes are used to form the source or drain with the P-type silylene layer and the N-type silylene layer. The tunnel field effect transistor of the present invention has a larger tunneling area, and enables the performance to be improved to a certain extent.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a tunnel field effect transistor and a manufacturing method thereof. Background technique [0002] In order to meet the increasing performance requirements for semiconductor devices, new technologies have been developed in the field of semiconductor manufacturing to obtain more ideal performance. For example, the tunneling field-effect transistor (TFET) has begun to partially Replace the existing metal oxide semiconductor field effect transistor (Metal Oxide Semiconductor Field Effect Transistor, MOSFET). [0003] In a conventional tunnel field effect transistor, a gate and source and drain regions are formed on a low-doped intrinsic semiconductor material substrate. When a voltage is applied to the gate, an electron accumulation layer and a depletion layer are formed on the surface of the channel region under the gate, the electron energy band bends downward, and the ...

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Problems solved by technology

This structure lacks carriers, resulting in a sharp increase in resistance, and the absence of a band gap means that logic circuits that must perform switching operations cannot be fabricated

Therefore, graphene is still difficult to be widely used in semiconductor manufacturing

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