Semiconductor device and semiconductor device packaging body using the semiconductor device
A semiconductor and packaging technology, which is applied to semiconductor devices, semiconductor/solid-state device components, electric solid-state devices, etc., to achieve the effect of increasing breakdown voltage and reducing parasitic capacitance
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[0100] Various embodiments of the present invention will be disclosed below with accompanying drawings, and for the sake of clarity, many practical details will be described together in the following description. It should be understood, however, that these practical details should not be used to limit the invention. That is, in some embodiments of the invention, these practical details are unnecessary. In addition, for the purpose of simplifying the drawings, some well-known and conventional structures and elements are shown in a simplified and schematic manner in the drawings.
[0101] Please refer to figure 1 and figure 2 ,in figure 1 It is a top view of the semiconductor device 100 according to an embodiment of the present invention, figure 2 for the edge figure 1 A cross-sectional view of line segment 2-2. As shown in the figure, the semiconductor device 100 includes an active layer 110, at least one source electrode 120, at least one drain electrode 130, at least...
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