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A Transistor-Based AND/XOR Gate Circuit

A transistor-level, gate-circuit technology, applied in the direction of logic circuits with logic functions, can solve the problems of integrated circuit design application limitations, high power consumption, long delay, etc., to achieve enhanced overall drive capability, correct circuit logic functions, Effect of Reducing Short-Circuit Power Dissipation

Active Publication Date: 2017-08-15
NINGBO UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the early days, due to the technical level, the application of integrated circuit design based on RM logic was limited.
In recent years, the research on the AND / XOR gate circuit structure has broken through the traditional circuit structure formed by cascading AND gates and XOR gates, and proposed a new AND / XOR gate circuit structure based on transistor-level design, but There are still problems such as long delay and high power consumption

Method used

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  • A Transistor-Based AND/XOR Gate Circuit
  • A Transistor-Based AND/XOR Gate Circuit
  • A Transistor-Based AND/XOR Gate Circuit

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Embodiment Construction

[0012] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

[0013] A transistor-level AND / XOR gate circuit, comprising a first transmission gate logic module, a second transmission gate logic module and a complementary CMOS logic module, the first transmission gate logic module comprising a fourth PMOS transistor P4, a seventh PMOS transistor P7, the fourth NMOS transistor N4 and the seventh NMOS transistor N7, the second transmission gate logic module includes the fifth PMOS transistor P5, the sixth PMOS transistor P6, the fifth NMOS transistor N5 and the sixth NMOS transistor N6, and the complementary CMOS logic module includes The first PMOS transistor P1, the second PMOS transistor P2, the third PMOS transistor P3, the eighth PMOS transistor P8, the first NMOS transistor N1, the second NMOS transistor N2, the third NMOS transistor N3 and the eighth NMOS transistor N8, the first The source of the PM...

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Abstract

The invention discloses a transistor-level AND / XOR gate circuit, which is characterized in that it includes a first transmission gate logic module, a second transmission gate logic module and a complementary CMOS logic module; the advantage is that in the complementary CMOS logic module, the first The PMOS transistor and the first NMOS transistor form the first inverter, the second PMOS transistor and the second NMOS transistor form the second inverter, the third PMOS transistor and the third NMOS transistor form the third inverter, and the eighth PMOS transistor and the eighth NMOS tube form the fourth inverter, the first transmission gate logic module and the second transmission gate logic module not only reduce the short-circuit power consumption, but also reduce the subthreshold power consumption of the fourth inverter, so that the circuit The overall power consumption is reduced; the four inverters enhance the overall drive capability of the circuit; the circuit structure of the invention is simple and relatively symmetrical, and is convenient for the layout of the layout.

Description

technical field [0001] The invention relates to a compound gate circuit, especially a transistor-level AND / exclusive OR gate circuit. Background technique [0002] With the continuous shrinking of integrated circuit process size and the rapid development of design technology, integrated circuits are developing towards larger scale and more complex trends, and power consumption has become one of the severe challenges facing the development of integrated circuits. At present, almost all circuit design methods use Boolean logic based on "AND", "OR", and "NO" operation sets, which can be called Traditional Boolean (TB) logic. It can be argued that some of the challenges facing IC design today are due to the inherent limitations of traditional Boolean logic. In fact, digital circuits can be implemented with traditional Boolean logic based on "AND or NOT", or Reed-Muller (RM) logic based on "AND / XOR (AND / XOR)". [0003] Delay, power consumption, and power consumption-delay produ...

Claims

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Application Information

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IPC IPC(8): H03K19/20
Inventor 夏银水阳媛梁浩钱利波李道通
Owner NINGBO UNIV
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