Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Low-temperature polycrystalline silicon TFT substrate structure and manufacturing method thereof

A technology of low-temperature polysilicon and manufacturing methods, which is applied in the direction of transistors, semiconductor/solid-state device manufacturing, electrical components, etc., and can solve the problems of uneven distribution, lattice uniformity, and lattice crystallization direction that cannot be effectively controlled, and long-term display effects. Uniformity and other issues, to achieve the effect of improving uniformity, improving electron mobility, and ensuring uniformity of grain boundaries

Inactive Publication Date: 2015-06-10
TCL CHINA STAR OPTOELECTRONICS TECH CO LTD
View PDF4 Cites 6 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0012] However, the current ELA crystallization technology cannot effectively control the uniformity of the crystal lattice and the crystallization direction of the crystal lattice, so the distribution of the crystallization state on the entire substrate is very uneven, resulting in long-term inhomogeneity of the display effect

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Low-temperature polycrystalline silicon TFT substrate structure and manufacturing method thereof
  • Low-temperature polycrystalline silicon TFT substrate structure and manufacturing method thereof
  • Low-temperature polycrystalline silicon TFT substrate structure and manufacturing method thereof

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0052] In order to further illustrate the technical means adopted by the present invention and its effects, the following describes in detail in conjunction with preferred embodiments of the present invention and accompanying drawings.

[0053] see Figure 5 , the present invention at first provides a kind of fabrication method of low-temperature polysilicon TFT substrate structure, comprises the following steps:

[0054] Step 1, such as Image 6 As shown, a substrate 1 is provided, the substrate 1 includes a driving TFT region and a display TFT region, and a buffer layer 11 is deposited on the substrate 1 .

[0055] Specifically, the substrate 1 is a glass substrate, and the material of the buffer layer 11 may be silicon oxide (SiOx), silicon nitride (SiNx), or a combination of both.

[0056] Step 2, such as Figure 7 As shown, an amorphous silicon layer 12 is deposited on the buffer layer 11, and the amorphous silicon layer 12 is patterned so that the thickness of the amo...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides a low-temperature polycrystalline silicon TFT substrate structure and a manufacturing method thereof. The method is that amorphous silicon layers for driving a TFT area and displaying the TFT area are set to be different thickness; the amorphous silicon layer for driving the TFT area is relatively small in thickness, and the amorphous silicon layer for displaying the TFT area is relatively large in thickness; therefore, the amorphous silicon layers for driving the TFT area and displaying the TFT area can generate different crystallizing effects under the effect of the same energy laser during the excimer laser annealing processing, and as a result, the size of crystallizing particles can be controlled, the amorphous silicon layer for driving the TFT area can generate large lattice during crystallizing in order to improve the electronic migration rate; the amorphous silicon layer for displaying the TFT area can achieve crystal breaking during crystallizing so as to ensure the uniformity of crystal boundary and improving the current uniformity, thus the electric requirements of different TFT can be met, and the OLED lighting uniformity can be improved.

Description

technical field [0001] The invention relates to the field of display technology, in particular to a low-temperature polysilicon TFT substrate structure and a manufacturing method thereof. Background technique [0002] Low Temperature Poly-silicon (LTPS) technology is a new generation of TFT substrate manufacturing technology. The biggest difference from traditional amorphous silicon (a-Si) technology is that low-temperature poly-silicon displays have a faster response speed and have high brightness, High resolution and low power consumption etc. advantages. Polycrystalline silicon (Poly-Si) has excellent electrical properties, and has good driving ability for active-matrix organic light emitting diodes (Active-Matrix Organic Light Emitting Diode, AMOLED). Therefore, AMOLED display backplanes based on low-temperature polysilicon technology are currently widely used. [0003] The manufacturing method of the existing low-temperature polysilicon TFT substrate structure mainly ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/84H01L21/336H01L27/12H01L29/04H01L29/06H01L29/786
CPCH01L21/84H01L27/1214H01L29/04H01L29/06H01L29/6675H01L29/78672H10K59/12H01L27/1233H01L27/1229H01L27/1274H10K59/1213H01L27/124H01L29/78675H01L29/78696
Inventor 张晓星
Owner TCL CHINA STAR OPTOELECTRONICS TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products