Clamp ESD protection circuit for latch-up prevention type power supply

Abstract

The invention relates to a clamp ESD protection circuit for a latch-up prevention type power supply, and relates to the technical field of electronic static discharge protection design of integrated circuit chips. The clamp ESD protection circuit for the latch-up prevention type power supply comprises a transient trigger module, a direct-current voltage detection module and a discharge transistor. Triggering of the discharge transistor of the clamp ESD protection circuit for the latch-up prevention type power supply is achieved through the transient trigger module, and maintenance of the start state of the discharge transistor is achieved through the direct-current voltage detection module. If the clamp ESD protection circuit for the latch-up prevention type power supply is mistakenly triggered by high-frequency noise, the circuit is automatically out of the mistaken trigger state in a short time, and the latch-up phenomenon is effectively prevented.

Description

technical field [0001] The invention relates to the technical field of electrostatic discharge (ESD) protection of integrated circuit chips, in particular to an anti-latch type power clamp ESD protection circuit. Background technique [0002] The anti-static impact design of integrated circuit chips is the focus and difficulty of reliability design in the semiconductor industry. With the advancement of semiconductor technology, the operating voltage of the chip is continuously decreasing, and the breakdown voltage of the semiconductor device is also continuously decreasing. These facts make the on-chip ESD protection design of the chip more and more difficult. How to design a reasonable full-chip ESD protection scheme within a narrower design window is the main focus of ESD protection design under advanced technology. [0003] The power clamp ESD protection circuit is an indispensable part of the full-chip ESD protection strategy. The power clamp ESD protection circuit is f...

AI Technical Summary

Problems solved by technology

In the actual application of the chip, many high-frequency noises that are not ESD shocks have the same transient characteristics as ESD shocks. These high-frequency noises will trigger the discharge device in the power clamp ESD protection circuit and turn it on. state, causing latch-up problems

The latch-up phenomenon will cause the failure of the integrated circuit chip, how to prevent the occurrence of the latch-up phenomenon is another big problem facing the design of the power supply clamp ESD protection circuit

[0005] In addition, the power clamp ESD protection circuit should have a small leakage when the chip is working normally, otherwise, the power clamp ESD protection circuit will firstly cause unnecessary power loss when the chip is working normally. Signal Integrity on Power Lines

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