Low-dropout regulator with high-power-supply-rejection-ratio characteristic
A technology with low dropout linearity and high power supply rejection, which is applied in the direction of instruments, electric variable adjustment, control/regulation systems, etc., can solve the problem of low power supply rejection, and achieve the effects of reducing equivalent resistance, high efficiency, and low noise
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[0015] The present invention is described in detail below in conjunction with accompanying drawing
[0016] The principle of traditional low dropout linear regulator circuit, such as figure 1 As shown, the structure adjusts the current of the NMOS transistor MNA1 through the error amplifier, and controls the current on the diode-connected PMOS transistor MPA1, thereby adjusting the output current through the mirror image. Regardless of the influence of the error amplifier on the power supply rejection ratio, consider the influence of the parasitic capacitance at point A1, and calculate the small signal v in The gain coupled to the gate terminal A1 of the power transistor MP0 is:
[0017] A A 1 ( s ) = ...
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