Indium Phosphide Wafer Annealing Box

Abstract

The invention discloses an indium phosphide wafer annealing box which comprises a base, a material containing chamber, wafer platforms, supporting pillars, fixing pillars and a top cover. The material containing chamber is a cavity chamber between the base and the wafer platforms, the wafer platforms are fixed to the base, each wafer platform is provided with the supporting pillars and the fixing pillars, the supporting pillars and the fixing pillars are distributed in a divergent mode, and a wafer is placed above the supporting pillars. By means of the above mode, the indium phosphide wafer annealing box can solve the problems that the annealing surfaces of the positive face and the negative face of the wafer are not consistent in appearance, gravity factors result in wafer deformation, no fixed material containing chamber is arranged in an existing wafer annealing box and the like. The indium phosphide wafer annealing box has the advantages that good electricity uniformity, surface integrity and geometric parameter are achieved, multi-chip simultaneous annealing is achieved, and production efficiency is improved.

Description

technical field [0001] The invention is applicable to the technical field of processing semiconductor materials, and in particular relates to an indium phosphide wafer annealing box. Background technique [0002] Indium phosphide wafer annealing has become an important processing technology. By annealing the wafer at high temperature, the thermal stress introduced during the growth process of the wafer can be reduced, the electrical uniformity of the wafer can be improved, and the fragmentation rate of the wafer can be reduced. The annealing process of indium phosphide wafers mainly includes the following steps: wafer cleaning, placement in the wafer annealing box, putting in an appropriate amount of red phosphorus, sealing it in a quartz tube, placing it in an annealing furnace for high-temperature annealing, and taking out the wafer, etc. However, using different wafer holders, the effect of annealing is different. There are two commonly used ways, namely: placing the wa...

AI Technical Summary

Problems solved by technology

When performing high-temperature annealing, the upper and lower surfaces of the wafer need to be in contact with the atmosphere. This structure is in ring contact with the edge of the wafer, which affects the atmosphere entering the lower surface of the wafer and affects the annealing effect.

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