Reference data access management method and device

Abstract

The invention discloses a reference data access management method and device suitable for H.264 / AVC parallel encoding devices. The reference data access management device comprises a plurality of first-stage buffering units respectively connected with a coding core, the first-stage buffering units are connected to a second-stage buffering unit through a bus, and the second-stage buffering unit is further connected with an external storage device. Only when data accessed by the coding core does not exist in the first-stage buffering units and the second-stage buffering unit, the data are required to be obtained from the external storage device. According to the reference data access management method and device, the relativity of macro block multi-core parallel H.264 encoder to visit reference data can be sufficiently used, and the access amount of the external storage device to the reference data is sufficiently reduced. Repeated buffering block storage in each buffer memory is eliminated as much as possible, and the hardware cost of the reference data access management device is ultra low.

Description

technical field [0001] The present invention relates to the field of video coding and decoding, in particular to a reference data management device suitable for H.264 / AVC parallel coding devices, which is suitable for reference data access management of parallel coding with a macro block row (Marco-Block Row) as the basic unit Methods and devices. Background technique [0002] The H.264 / AVC standard has been accepted by the industry for its excellent image compression performance. However, as the image format to be encoded increases from CIF to D1, 720P, 1080P and even 4kx2k (Ultra HD), the H.264 encoding has a higher The amount of calculation has become a major problem in some fields with high requirements for low power consumption. The method used by the industry to reduce H.264 encoding power consumption in the algorithm implementation stage is to reduce the hardware / processor clock frequency during the encoding process through parallel processing, and then reduce the ha...

AI Technical Summary

Problems solved by technology

[0010] Treating the local buffer inside the first-level data access control device, such as sliding window or cache, as distributed RAM and using NUMA (non-uniform memory access, non-uniform memory access) architecture management helps to reduce the RAM overhead problem, however Common cache coherence protocols such as MOESI are too complex for the H.264 encoding core and difficult to design and verify

And the data management inside the data access control module of each coding core needs to consider other coding cores, which makes the design extraordinarily complicated

No H.264 macroblock parallel encoders using this design have been reported so far

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