Method for forming metal gate

Abstract

A formation method of a metal gate includes: providing a semiconductor substrate and forming pseudo gates on the semiconductor substrate; forming a dielectric layer on the surface of the semiconductor substrate; flushing the surface of the dielectric layer and the surfaces of the pseudo gate; removing the pseudo gates to form grooves, and forming functional layers at the bottoms and the side walls of the grooves; forming silicon layers on the surfaces of the functional layers in the grooves, wherein the surfaces of the silicon layers are flush with the surfaces of the dielectric layer; forming an aluminum metal layer on the surface of the dielectric layer and the surfaces of the silicon layers; annealing the semiconductor substrate in an atmosphere containing fluorine, wherein aluminum in the aluminum metal layer and silicon in the silicon layers are exchanged to form the metal gate, and the silicon and fluorine are reacted at the same time to form a fluorine silicon compound. Since annealing is performed in the atmosphere containing the fluorine, the exchanged silicon stored in the aluminum metal layer is consumed by the fluorine, speed and efficiency of silicon exchange in the aluminum and silicon layers in the aluminum metal layer are accordingly increased.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a method for forming an aluminum metal gate. Background technique [0002] With the continuous development of integrated circuit manufacturing technology, the feature size of MOS transistors is getting smaller and smaller. In order to reduce the parasitic capacitance of the gate of MOS transistors and improve the device speed, the gate stack of high K gate dielectric layer and metal gate structure is introduced into MOS transistors. In order to avoid the influence of the metal material of the metal gate on other structures of the transistor, the gate stack structure of the metal gate and the high-K gate dielectric layer is usually fabricated by a “gate last” process. [0003] Figure 1 ~ Figure 3 It is a schematic diagram of a cross-sectional structure of a metal gate fabricated by an existing "gate last" process. [0004] refer to figure 1 , provide a semiconductor...

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Problems solved by technology

[0008] However, as the size of the device continues to decrease, the impedance of the metal gate formed by the above method will increase, and leakage current will easily occur, and gaps will easily occur when filling the metal layer, which will affect the stability of the transistor. In order to solve the above problems, the application number The US patent of US6080646A proposes a method for forming a metal gate, comprising: providing a semiconductor substrate on which a dummy gate is formed; forming a dielectric layer on the semiconductor substrate, and the surface of the dielectric layer is in contact with The surface of the dummy gate is flush; an aluminum metal layer is formed on the surface of the dummy gate and the dielectric layer; annealing is performed, and the polysilicon in the dummy gate is exchanged with the aluminum in the aluminum metal layer to form a metal gate; the interactive polysilicon and some unreacted aluminum layer

[0009] However, in the above-mentioned method of forming an aluminum metal gate, the interaction rate and efficiency of aluminum and polysilicon are low, and the annealing temperature is relatively high

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