Manufacturing method for separated grid type flash memory embedded into logical circuit

Abstract

The invention provides a manufacturing method for a separated grid type flash memory embedded into a logical circuit. According to the method, the separated grid type flash memory can be embedded into a peripheral circuit of a high-voltage circuit and the logical circuit, and the separated grid type flash memory, the high-voltage circuit and the logical circuit can be manufactured on a chip at the same time. After a stacking structure, comprising a floating gate oxide layer, a floating gate, a gate medium layer, a control gate and a hard mask layer, of the memory is formed, the thickness of a memory word line gate and the thickness of an erasing gate can be defined only through two-time polycrystalline silicon layer deposition and one-time photoetching glue line imaging treatment, and compared with three-time polycrystalline silicon layer deposition and two-time photoetching glue line imaging treatment in the prior art, the method greatly simplifies a manufacturing process. In addition, a gate medium layer of a high-voltage transistor is formed before the stacking structure of the memory is formed, and therefore the high-quality gate medium layer can be formed by means of a thermal oxidation growing method.

Description

Technical field [0001] The present invention relates to the field of semiconductor technology, in particular to a method for manufacturing a split gate type flash memory embedded in a logic circuit. Background technique [0002] Random access memory, such as DRAM and SRAM, has the problem of data loss after power failure during use. To overcome this problem, people have designed and developed a variety of non-volatile memories. Recently, flash memory based on the concept of a floating gate has become the most versatile nonvolatile memory due to its smaller cell size and good operating performance. The non-volatile memory mainly includes two basic structures: a stack gate structure and a split gate structure. Stacked gate memory includes a floating gate oxide layer formed on the substrate, a floating gate storing electrons, an oxide-nitride-oxide (ONO) stack structure and a control electron storage And release the control grid. The split-gate memory also includes a floating ga...

AI Technical Summary

Problems solved by technology

If the split-gate flash memory, high-voltage circuit, and logic circuit are all built on a separate integrated chip, the operating speed of the entire memory will be limited by the signal transmission bandwidth between the flash memory and peripheral circuits

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