P-type silicon substrate heterojunction cell

Abstract

The invention discloses a P-type silicon substrate heterojunction cell which comprises a P-type crystalline silicon substrate layer, an intrinsic non-crystalline silicon layer, an N-type non-crystalline silicon layer, a P-type non-crystalline silicon doping layer, a first transparent conducting layer, an upper electrode layer, an intrinsic non-crystalline silicon germanium passivation layer, a second transparent conducting layer and a back electrode layer, wherein the P-type crystalline silicon substrate layer is provided with a front and a back; the intrinsic non-crystalline silicon layer is deposited at the front of the P-type crystalline silicon substrate layer; the N-type non-crystalline silicon layer is deposited on the upper surface of the intrinsic non-crystalline silicon layer; the first transparent conducting layer is located on the upper surface of the N-type non-crystalline silicon layer; the intrinsic non-crystalline silicon germanium passivation layer is deposited at the back of the P-type crystalline silicon substrate layer; the P-type non-crystalline silicon doping layer is deposited on the lower surface of the intrinsic non-crystalline silicon germanium passivation layer; the second transparent conducting layer is located on the lower surface of the P-type non-crystalline silicon doping layer; and the back electrode layer is located on the lower surface of the second transparent conducting layer, and is electrically connected with the P-type non-crystalline silicon doping layer through the second transparent conducting layer. According to the P-type silicon substrate heterojunction cell, the transition probability of a hole at the back of a substrate can be increased; collection and utilization of carriers are increased; a short-circuit current is increased; and the conversion efficiency of the cell is improved.

Description

technical field [0001] The invention relates to a P-type silicon substrate heterojunction cell, which belongs to the technical field of solar cells. Background technique [0002] At present, using P-type crystalline silicon as the substrate to form heterojunction battery devices generally uses intrinsic type a-Si to passivate the surface of crystalline silicon (substrate), and at the same time add doped p-a-Si:H The back field (BSF) is formed, but due to the large valence band between p-a-Si:H and p-c-Si, the probability of hole transition tunneling in the back field is reduced, so that the carrier cannot be collected effectively. Light energy conversion efficiency is reduced. Contents of the invention [0003] The technical problem to be solved by the present invention is to overcome the defects of the prior art and provide a P-type silicon substrate heterojunction cell, which can increase the transition probability of holes on the back of the substrate, increase the col...

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Problems solved by technology

[0002] At present, using P-type crystalline silicon as the substrate to form heterojunction battery devices generally uses intrinsic type a-Si to passivate the surface of crystalline silicon (substrate), and at the same time add doped p-a-Si:H The back field (BSF) is formed, but due to the large valence band between p-a-Si:H and p-c-Si, the probability of hole transition tunneling in the back field is reduced, so that the carrier cannot be collected effectively. Light energy conversion efficiency is reduced

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