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Large-area bonding structure of semiconductor substrate and manufacturing method thereof

A semiconductor and large-area technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as high process temperature and pressure, low yield rate, and application limitations of bonding LED technology, so as to improve yield rate , reduce requirements, reduce the effect of pressure and temperature

Inactive Publication Date: 2013-07-31
JIANGSU MICRO WAVE ELECTRONICS TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the yield rate of the whole chip bonding process of the prior art is very low, and the requirements for the cleanliness of the process environment and the surface granularity of the LED epitaxial wafer and the supporting substrate for bonding are very high. At the same time, the bonding process requires The process temperature and pressure are also relatively high, and various factors have greatly restricted the application of the whole bonding LED process
At the same time, with the increase in the size of LED epitaxial wafers and the emergence of silicon substrate LED epitaxial wafers, the problems caused by such process limitations have become more and more prominent

Method used

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  • Large-area bonding structure of semiconductor substrate and manufacturing method thereof
  • Large-area bonding structure of semiconductor substrate and manufacturing method thereof
  • Large-area bonding structure of semiconductor substrate and manufacturing method thereof

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specific Embodiment 1

[0059] Specific embodiment 1 is applied to the large-area bonding process of quaternary light-emitting diodes. Usually, the substrate used for quaternary light-emitting diodes is a gallium arsenide substrate 101, and a gallium arsenide buffer is epitaxially grown on the gallium arsenide substrate. Layer 102; growing the first conductive type semiconductor layer 103 includes: n-type gallium arsenide layer, n-type InGaP corrosion stop layer, n-type doped InGaAlP layer; growing multi-quantum well light-emitting active layer 104; growing the second conductive type Semiconductor layer 105: p-type doped InGaAlP, p-type doped GaP. So far, the growth of the quaternary LED epitaxial wafer is completed. In order to perform the subsequent bonding process, a contact layer 106 is prepared on the second conductivity type semiconductor layer 105, which forms an ohmic contact with the second conductivity type semiconductor layer, and the metal forming the contact layer preferably includes Ti,...

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Abstract

The invention discloses a large-area bonding structure of a semiconductor substrate, which comprises a semiconductor substrate for bonding and a support substrate for bonding, and is characterized in that linkage layers are arranged on the surfaces of the semiconductor substrate for bonding and the support substrate for bonding, wherein micro bulged blocks which are regularly or irregularly distributed are arranged on the linkage layers on at least one edge of each of the semiconductor substrate for bonding and the support substrate for bonding; and the linkage layers of the semiconductor substrate for bonding and the support substrate for bonding are linked through a bonding technology. With the adoption of a method provided by the invention, the rate of finished products of the bonding technology can be improved substantially, and further, the problems of electric leakage and the like caused by metal adhesion during scribing can be relieved greatly.

Description

[0001] technical field [0002] The invention relates to a semiconductor process, in particular to a large-area bonding structure of a semiconductor substrate and a manufacturing method thereof. Background technique [0003] The application range of light-emitting diodes in the field of solid-state lighting is becoming wider and wider. Correspondingly, there are higher requirements for improving luminous power and reliability. Vertical structure LEDs prepared by the whole chip bonding process have good device heat dissipation , high light extraction efficiency, can be well used in high-end LED applications. [0004] Many companies have applied for patents on the existing whole chip bonding process. The basic process features are the smooth metal bonding surface on the surface of the LED epitaxial wafer and the supporting substrate, and the bonding surface is bonded by increasing the temperature and pressure. However, the yield rate of the whole chip bonding process of the p...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/683H01L33/02H01L33/00
Inventor 许玉方
Owner JIANGSU MICRO WAVE ELECTRONICS TECH
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