Quasi-cyclic low-density parity-check (LDPC) code construction method capable of eliminating decoder access conflict

Abstract

The invention relates to a quasi-cyclic low-density parity-check (LDPC) code construction method. A quasi-cyclic LDPC code to be constructed is represented by a tree graph model Tanner graph, and the quasi-cyclic check matrix parameter is that the size of a basis matrix is m * n, the size of a Block matrix is p * p, and basis matrix variable nodal point dimensionality distribution is represented by dv. The method comprises the follow steps: (1) determining check nodal point homogenization dimensionality distribution (dc) according to the basis matrix variable nodal point dimensionality distribution (dv) and adding all the n variable nodal points to the Tanner graph according to the dimensionality distribution (dc); (2) adding m check nodal points to the Tanner graph line by line and selecting pre-selected variable nodal points, determining the variable nodal points reaching a weight preset value according to side boundary weight and serving as an alternative set, and obtaining the variable nodal points with avoiding degree (ADeg) equal to or larger than delay (DLY) in a screening mode from the alternative set; and (3) determining the side boundary weight in the Tanner graph according to the points obtained from the step (2), adding corresponding sides to the Tanner graph, obtaining the quasi-cyclic LDPC code according to the Tanner graph, and achieving the construction of the quasi-cyclic LDPC code.

Description

technical field [0001] The invention relates to a construction method of a linear error correction code, in particular to a construction method of a quasi-cyclic LDPC code which can eliminate the access conflict of a layered decoder and adopts the method of establishing check nodes row by row. Background technique [0002] The original LDPC (low-density parity-check, LDPC) decoding algorithm was proposed by Gallager, and its confidence propagation method is flooding schedule. Mansour et al. proposed a confidence propagation method of Turbo decoding, and Hocevar et al. called this propagation method based on serially updated confidence a layered decoding algorithm (Layered Decoding). Hierarchical decoding algorithms can reduce the number of iterations required for decoding by half without losing performance and reducing computational complexity, so they have attracted extensive attention. [0003] The block-row layered decoding algorithm adopts parallel operation of all rows...

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Problems solved by technology

References (Sun Y, Karkooti M, Cavallaro J. High throughput, parallel, scalable LDPC encoder / decoder architecture for OFDM systems. Design, Applications, Integration and Software, 2006 IEEE Dallas / CAS Workshop on, Oct.2006: 39-42 ) in the pipeline to add idle beats to solve the access conflict problem, but reduces the decoder throughput; references (Bhatt T, Sundaramurthy V, Stolpman V, et al. Pipelined Block-Serial Decoder Architecture for Structured LDPC Codes. and Signal Processing, 2006 IEEE International Conference on, 2006: 225-228), channel information mirror RAM is added, and the channel information is approximately updated by the amount of non-computational information changes, which improves the efficiency of pipeline operations, but the performance is lost

Scheduling in references (Rovini M, Gentile G, Rossi F, et al. A minimum-latency block-serial architecture of a decoder for IEEE 802.11n LDPC codes. IFIP International Conference on Very Large Scale Integration, 2007: 236-241) The operation sequence of each block row and the channel information input and output sequence in the check node processor match the operation sequence of adjacent operation rows, which can only minimize idle waiting; references (Jin Jie, Tsui Chi-ying.An Energy Efficient Layered Decoding Architecture for LDPC Decoder.IEEE Trans.on VLSI, 2010, 18(8): 1185-1195) uses the characteristics of access conflicts, uses as much coupling as possible to reduce the number of times to read channel RAM, and reduce power consumption. However, it is also limited by the check matrix structure; in references (Marchand C, Dore J B, Conde-Canencia L, et al. Conflict resolution for pipelined layered LDPC decoders. Signal Processing Systems, 2009: 220-225), the QC-LDPC base The matrix is ​​divided into small base matrices of S*S, and then rearranged to loosen resource conflicts between pipelines, but reduce the parallelism of the decoder and reduce the throughput

[0004] The methods in the above references all solve the access conflict problem to varying degrees from the perspective of decoder design, but they are all limited by the check matrix structure of the LDPC code. The design process is complicated but cannot completely eliminate the conflict problem. At the same time, resources or speed or performance cost

The root cause of access violations in the implementation of row-layered decoding is that this problem was not considered in the code design

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