An array substrate, its preparation method, and a display device

A technology of array substrates and substrates, which is applied in semiconductor/solid-state device manufacturing, electrical components, electric solid-state devices, etc., and can solve the problem that the aperture ratio is difficult to meet the demand

Active Publication Date: 2016-08-31
BEIJING BOE OPTOELECTRONCIS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0004] However, with the development of high PPI (Pixels per inch, the number of pixels per inch) products in the market, the aperture ratio of products produced using existing technologies is difficult to meet the demand. Therefore, how to increase the aperture ratio has become a new issue. research direction

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  • An array substrate, its preparation method, and a display device
  • An array substrate, its preparation method, and a display device
  • An array substrate, its preparation method, and a display device

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preparation example Construction

[0047] An embodiment of the present invention provides a method for preparing an array substrate, the method comprising: forming a thin film transistor and a pixel electrode 30 on the substrate, the thin film transistor including a gate electrode 20, a source electrode 701 and a drain electrode 702, and an active layer 60; further, the method further includes: forming a metal conductive region 40 above or below the gate electrode 20 for reducing the turn-on delay time of the thin film transistor.

[0048] The forming of the gate electrode 20 , the source electrode 701 and the drain electrode 702 on the substrate includes: forming the gate electrode 20 , the source electrode 701 and the drain electrode 702 of a transparent conductive material on the substrate.

[0049] An embodiment of the present invention provides a method for preparing an array substrate, the method comprising: forming a thin film transistor and a pixel electrode 30 on the substrate, the thin film transistor ...

Embodiment 1

[0064] Embodiment 1, the embodiment of the present invention provides a method for preparing a bottom-gate array substrate, such as Figure 7 shown, including the following steps:

[0065] S101. Fabricate a transparent conductive film on the substrate 10, and form a patterning process such as Figure 8 Gate electrode 20 and pixel electrode 30 are shown.

[0066] Specifically, chemical vapor deposition can be used to deposit a layer with a thickness of arrive The transparent conductive film layer between, wherein commonly used transparent conductive film can be ITO or IZO thin film; Then coat one deck photoresist on described transparent conductive film, and utilize promptly to comprise grid electrode 20 patterns and comprise pixel electrode 30 again The patterned mask board exposes the substrate on which the photoresist is formed, and after developing and etching, the gate electrode 20 and the pixel electrode 30 are formed on a certain area of ​​the substrate. Of course,...

Embodiment 2

[0092] Embodiment 2, the embodiment of the present invention provides a method for preparing a bottom-gate array substrate, such as Figure 14 shown, including the following steps:

[0093] S201. Fabricate a transparent conductive film on the substrate 10, and form such a pattern through a patterning process. Figure 15 The gate electrode 20 is shown.

[0094] Of course, here, while forming the gate electrode 20 , the gate lines and gate line leads electrically connected to the gate electrodes 20 are also formed.

[0095] S202. On the substrate that has completed step S201, make a metal conductive film, and form a metal conductive film on the gate electrode 20 through a patterning process. Figure 16 The metal conductive region 40 is shown, and the metal conductive region 40 corresponds to the active layer 60 to be formed in the following step S204.

[0096] Here, the formation position of the metal conductive region 40 needs to be determined according to the formation posi...

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Abstract

An array substrate and a preparation method, and a display device. The array substrate comprises: a thin-film transistor. The thin-film transistor comprises a gate electrode (20), a source electrode (701), a drain electrode (702), and an active layer (60), wherein the gate electrode (20), the source electrode (701) and the drain electrode (702) are made of a transparent conducting material.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an array substrate, a preparation method, and a display device. Background technique [0002] Currently, if figure 1 As shown, the array substrate includes a gate metal layer of a gate electrode 20, a source-drain metal layer including a source electrode and a drain electrode, and a pixel electrode 30; since the gate metal layer and the source-drain metal layer constituting the array substrate are opaque, openings rates have been reduced to some extent. [0003] ADS (Advanced-Super Dimension Switch) display technology is widely used due to its advantages of high resolution, high transmittance, low power consumption, wide viewing angle, and high aperture ratio. figure 1 As shown, a common electrode 90 is formed on the array substrate. [0004] However, with the development of high PPI (Pixels per inch, the number of pixels per inch) products in the market, the aperture...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/12H01L21/77
CPCH01L29/4908H01L27/124H01L29/458
Inventor 郭仁炜董学马磊
Owner BEIJING BOE OPTOELECTRONCIS TECH CO LTD
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