Silicon-on-insulator (SOI) metal-oxide-semiconductor (MOS) transistor

Abstract

The invention provides a silicon-on-insulator (SOI) metal-oxide-semiconductor (MOS) transistor which comprises a device active region which has a continuous shape, a grid, a source region, a drain region and a body contacting active region, wherein the device active region is formed in an SOI layer of an SOI substrate; the grid extends by crossing the device active region; the source region and the drain region are respectively positioned in the device active region at the two sides of the grid; and the body contacting active region is independent with the device active region, and electrically connected with a channel region below the grid without being isolated to the bottom. The SOI MOS transistor provided in the invention is beneficial to inhibiting the floating body effect, the influences of the parasitic capacitance and the parasitic resistance of a channel transistor are decreased, and the side leakage current is reduced.

Description

technical field [0001] The invention relates to the field of semiconductor transistors, in particular to a body-contact SOI MOS transistor capable of suppressing the floating body effect of an SOI MOS (Metal Oxide Semiconductor) transistor. Background technique [0002] SOI (Silicon On Insulator) refers to silicon-on-insulator technology, and SOI technology is recognized as one of the mainstream semiconductor technologies in the 21st century. SOI technology effectively overcomes the shortage of bulk silicon materials, fully exploits the potential of silicon integrated circuit technology, and is gradually becoming the mainstream technology for manufacturing high-speed, low power consumption, high integration and high reliability VLSI. [0003] SOI MOS is divided into partially depleted SOI MOS (PDSOI) and fully depleted SOI MOS (FDSOI) according to whether the active body region is depleted. Generally speaking, the top silicon film of fully depleted SOI MOS is relatively thi...

AI Technical Summary

Problems solved by technology

The T-type gate and H-type gate technologies in the prior art cannot effectively suppress the floating body effect due to the existence of the body resistance of the P-type Si region, and the wider the channel, the greater the body resistance and the more significant the floating body effect

The BTS structure directly forms the P+ region in the source region. The disadvantage is that the source and drain are asymmetrical, making the source and drain unable to be interchanged, the effective channel width is reduced, and the source contact introduces a large parasitic capacitance, which makes the device performance worse.

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