Side wall etching method for reducing heat current carrier injection damage

Abstract

The invention discloses a side wall etching method for reducing heat current carrier injection damage. Ion injection is carried out on a side wall deposition layer by using neutral ions, and the ion injection direction forms an included angle with the direction vertical to a substrate and is inclined towards the source electrode direction, so the etching speed on the side wall above a source electrode region is higher than the etching speed on the side wall above a drain electrode region in the side wall etching process, after etching, the cross section width of the side wall of a source electrode is relatively reduced, and the cross section width of the side wall of a drain electrode is relatively increased. After voltage is applied on a grid electrode, the intensity of a longitudinal electric field generated at the drain terminal is weakened, so electron hole pairs are generated through the collision of current carriers accelerated by a transverse electric field, and the injection into the grid electrode can be realized by holes under the effect of the weak longitudinal electric field, so the grid current formed because of the hot current carrier injection is reduced, and the hot current carrier injection damage of a semiconductor device is reduced.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a side wall etching method for reducing hot carrier injection damage. Background technique [0002] The hot carrier effect is an important failure mechanism of MOS (metal oxide semiconductor) devices. With the shrinking of the size of MOS devices, the hot carrier injection effect of the devices becomes more and more serious. Taking a PMOS (P-type metal oxide semiconductor) device as an example, the holes in the channel are accelerated under the action of a high lateral electric field between the drain and source to form high-energy carriers, which collide with the silicon lattice. Generate ionized electron-hole pairs, the electrons are collected by the substrate to form a substrate current, most of the holes generated by the collision flow to the drain, but some holes are injected into the gate under the action of the vertical electric field The formation of gate curre...

AI Technical Summary

Problems solved by technology

Hot carriers will break the energy bond at the interface between the silicon substrate and the silicon dioxide gate oxygen, and generate interface states at the interface between the silicon substrate and the silicon dioxide gate oxygen, resulting in device performance, such as threshold voltage, transconductance, and linearity. The degradation of the current in the region / saturation region will eventually cause the failure of the MOS device

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