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Image/video feature extraction parallel algorithm based on multi-core system structure

A feature extraction and architecture technology, applied in the direction of concurrent instruction execution, computing, machine execution devices, etc., can solve problems such as unsatisfactory acceleration, and achieve the effect of reducing load imbalance, eliminating the crisis of scalability, and reducing load.

Inactive Publication Date: 2012-06-13
FUDAN UNIV +1
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Problems solved by technology

As a result, the acceleration of these parallel techniques on current parallel hardware is not ideal

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  • Image/video feature extraction parallel algorithm based on multi-core system structure
  • Image/video feature extraction parallel algorithm based on multi-core system structure

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Embodiment Construction

[0013] The parallel algorithm in the present invention will be described in detail below in conjunction with the accompanying drawings. The invention mainly combines the characteristics of task-level parallel technology and pipeline-level parallel technology. All parallel technologies are based on the current mainstream feature extraction algorithm SURF (Speeded-Up Robust Features) for image / video retrieval, and are implemented using pthreads. The present invention is implemented on a general multi-core processor. Below we will describe the implementation of this technology in detail and test its performance. Such as figure 1 As shown, from a coarse-grained point of view, the parallel technology of the present invention adopts task-level parallel technology. From a fine-grained point of view, each block-parallel thread group further introduces pipeline-level parallelism to process data. We also analyzed in detail the advantages of the technology of the present invention comp...

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Abstract

The invention belongs to the technical field of parallel algorithm, and particularly discloses an image / video feature extraction parallel algorithm based on a multi-core system structure. The image / video feature extraction parallel algorithm combines the task level parallel technology with the pipeline level parallel technology to realize feature extraction. Process image or video frame data are divided into a plurality of sub-domains by the task level parallel technology, and the data of the sub-domains are distributed to different processing units of multi-core hardware to be processed simultaneously; and execution of the feature extraction algorithm is divided into a plurality of processing stages by the pipeline level parallel technology, the data are transmitted among various stages in a stream form, and feature extraction of image / video frames is completed. The characteristics of the two technologies are combined, so that performances of the image / video feature extraction parallel algorithm are improved. In addition, real-time processing speed of 42 frames per second is realized on a universal multi-core processor by the aid of the feature extraction algorithm aiming at image / video retrieval.

Description

technical field [0001] The invention belongs to the technical field of parallel processors, and in particular relates to a feature extraction algorithm for image / video retrieval. Background technique [0002] As human beings enter the digital age, a large amount of data from different fields is generated every day. Among them, multimedia data types, such as images, videos, etc., have become one of the main data types processed by the Internet. How to effectively screen, understand and process the growing image / video data has received more and more attention. Compared with traditional text-based applications, applications centered on multimedia data, such as search engines, filtering systems, and copy detection, have more and more practical requirements. Among them, the feature extraction algorithm of image retrieval, as a core basic algorithm of image / video information retrieval applications, can effectively extract the information of key frames of images or videos for ret...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/38G06F17/30G06K9/46
Inventor 张为华房振满杨冬蕾臧斌宇
Owner FUDAN UNIV
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