Data processor for improving storage instruction execution efficiency

Abstract

A data processor for improving the storage instruction execution efficiency comprises a register file, an instruction decoding unit, an instruction scheduling unit, a storage instruction queue and instruction execution units, wherein the instruction scheduling unit is used for completing feedforward of the address operand of a stored instruction and feedforward of all operands of other instructions according to related information of instruction operands, and transmitting the instructions completed by operand feedforward to the corresponding instruction execution unit; the storage instruction queue is used for receiving storage instructions from the instruction decoding unit, storing write-back data and related information of the stored instruction, monitoring outlet data of all the execution units and completing feedforward of the write-back data of the stored instruction according to the related information of the stored instruction data operand; and the instruction execution units are used for receiving instructions transmitted by the instruction scheduling unit and are divided into different execution units according to the instruction types. The data processor provided by the invention effectively reduces breakdown of assembly lines due to genuine correlation of data write after read, improves the execution efficiency of storage instructions and has promoted performance.

Description

technical field [0001] The present invention relates to a data processor. Background technique [0002] In the pipeline technology of processors, pipeline conflicts mainly include: structure conflicts, data conflicts and control conflicts. With the continuous deepening of the pipeline, these types of conflicts cause the pipeline to stall, seriously affecting the performance of the processor. Structural conflicts can be resolved by increasing resources; for control conflicts, various technologies such as branch predictors and branch target buffers are used to reduce the performance loss caused by control conflicts; for data conflicts, especially read-after-write The real correlation, the hardware usually adopts a feed-forward mechanism to alleviate the performance loss caused by it. [0003] For storage instructions, its operands are divided into address operands and data operands, and its operands may come from the execution results of various instructions, including arith...

AI Technical Summary

Problems solved by technology

[0004] In order to overcome the shortcomings of the existing data processors in solving the true correlation of data read after write in the storage data correlation, the pipeline pause is longer, the execution efficiency of storage instructions is low, and the performance of the processor is limited, the present invention proposes a A data processor that effectively reduces the pipeline stalls caused by the true correlation of data read and write, speeds up the execution efficiency of storage instructions, and improves the performance of the processor.

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