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Anti-differential power attack ternary counter based on sense amplification logic

A sensitive amplification logic and differential energy attack technology, which is applied in the direction of synchronous pulse counters, etc., can solve the problems of reduced information density and high power consumption of hardware circuits, and achieve the effects of reduced complexity and cost, constant power consumption, and improved reliability

Inactive Publication Date: 2014-06-25
HANGZHOU MAEN TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the existing literature, there are circuit structures against differential energy attacks, such as SABL (Sense Amplifier Based Logic) circuits, WDDL (Wave Dynamic Differential Logic) circuits, etc., but these circuits consume a lot of power and are The information density contained in the circuit is reduced by 50%

Method used

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  • Anti-differential power attack ternary counter based on sense amplification logic
  • Anti-differential power attack ternary counter based on sense amplification logic
  • Anti-differential power attack ternary counter based on sense amplification logic

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Embodiment Construction

[0015] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

[0016] Such as Figure 1 to Figure 4 As shown, a three-valued counter based on sensitive amplification logic against differential energy attack, which includes a binary logic conversion circuit 1 and a sensitive amplification logic conversion circuit 2, the sensitive amplification logic conversion circuit 2 is provided with a current compensation circuit 3, The binary logic conversion circuit 1 is composed of a first D flip-flop D1, a second D flip-flop D2, a NAND gate T1 and an exclusive NOR gate T2, and the first input terminal 1D of the first D flip-flop D1 is connected to the second D flip-flop The first input terminal 2D of the device D2 is connected to the clock signal input terminal clk in parallel, and the non-inverting output terminal of the first D flip-flop D1 and the non-inverting output terminal of the second D flip-flop D2 are re...

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Abstract

The invention discloses an anti-differential power attack ternary counter based on sense amplification logic, characterized by comprising a binary logic switching circuit and a sense amplification logic switching circuit, wherein the sense amplification logic switching circuit is provided with a current compensation circuit; the binary logic switching circuit is composed of a first D flip-flop, a second D flip-flop, an NAND gate and an XNOR gate; the sense amplification logic switching circuit is composed of a first PMOS (P-channel Metal Oxide Semiconductor) FET (Field Effect Transistor), a second PMOS FET, a third PMOS FET, a first NMOS (N-channel Metal Oxide Semiconductor) FET, a second NMOS FET, a third NMOS FET and a fourth NMOS FET; and a first signal output end and a second signal output end of the sense amplification logic switching circuit are connected in parallel with the current compensation circuit. The invention has the advantages that the circuit of the ternary counter has the characteristic of constant power consumption, the ternary counter has good anti-differential power attack effect, the complexity and cost of wire connection among circuits are greatly reduced, and the reliability of the circuits is improved.

Description

technical field [0001] The invention relates to a three-value counter, in particular to a three-value counter which is based on sensitive amplification logic and resists differential energy attack. Background technique [0002] Since Kocher, the American Institute of Cryptography, proposed the concept of side channel attacks in 1998, [1] , as a hot research direction, has attracted extensive attention in various fields. Traditional cryptographic attacks use mathematical analysis methods to reveal the weaknesses of encryption algorithms. This requires the attacker to have considerable attainments in cryptanalysis and encryption algorithms. Side-channel attacks only use some marginal information, such as power consumption, execution time, output and input behavior during failures, radiation, power spikes, and other information to attack encryption chips, and it does not require attackers to be proficient in cryptanalysis and encryption algorithms. This poses a great threat ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03K23/52
Inventor 汪鹏君张跃军
Owner HANGZHOU MAEN TECH
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