Performance acceleration method of heterogeneous multi-core computing platform on chip

Abstract

The invention discloses a performance acceleration method of a heterogeneous multi-core computing platform on chip, wherein the heterogeneous multi-core computing platform on chip comprises a plurality of general processors for executing tasks, a plurality of hardware IP (Internet Protocol) cores and a core scheduling module; and the core scheduling module is responsible for task partitioning and scheduling, so as to allocate the tasks to different computing units for execution. The performance acceleration method is characterized by comprising the following steps of: (1) taking a performance acceleration ratio of a single-core processor as an evaluation index, evaluating the influence of a software and hardware task partitioning scheme of the core scheduling module on the acceleration ratio under the premise of fixed hardware platform, and obtaining the task type, the number of the general processors, the number of hardware acceleration parts and an acceleration ratio parameter of single hardware acceleration part under the optimal performance condition; and (2) reconfiguring the hardware platform according to the task type, the number of the general processors, the number of hardware acceleration parts and the acceleration ratio parameter of single hardware acceleration part under the optimal performance condition. The method can obviously improve the accelerated running efficiency of the system, so that all the resource of the system can be fully used.

Description

technical field [0001] The invention belongs to the technical field of performance optimization of an on-chip heterogeneous multi-core computing platform, and in particular relates to a task scheduling system of an on-chip multi-core computing platform and a performance acceleration method adopted therefor. Background technique [0002] As the complexity of very large scale integration (VLSI) increases rapidly according to Moore's law, the performance improvement of a single processor has reached the limit, and multi-core processors have become the inevitable direction of the development of microprocessor architecture. Especially for single-chip heterogeneous multi-core systems, it integrates heterogeneous processing units such as general-purpose processors, DSPs, ASIPs, and even mixed-signal circuits on the same chip, giving full play to the respective advantages of heterogeneous processing units, and can meet the needs of embedded systems. The requirements for real-time pe...

AI Technical Summary

Problems solved by technology

However, there are still two key problems in the current heterogeneous multi-core system: First, how to efficiently divide the software and hardware tasks is still a difficult point in the field of research

[0006] In general, the task division and scheduling method in the task parallel scheduling method in the current parallel programming model requires manual intervention and configuration by the programmer, which limits the performance optimization effect that the platform can obtain, and cannot obtain platform performance. Impact on Computing Resources and Task Sequences

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