A clock synchronization method and device

Abstract

Disclosed in the embodiments of the present invention are a method and device for clock synchronization. The method comprises the following steps: slave clock equipment simultaneously carries out protocol message interactions with multiple clock source equipment , and respectively computes the time and frequency deviation with each clock source equipment according to the protocol message interaction with the multiple clock source equipment to lock the multiple clock source equipment; the slave clock equipment selects a primary clock source from the multiple clock source equipment, and corrects self time and frequency according to the time and frequency deviation with the primary clock source. According to the embodiments of the present invention, the clock source equipment is immediately locked as soon as being discovered rather than starts to be locked after being switched, so that the multiple clock source equipment is simultaneously locked by the slave clock equipment, and when the clock source equipment switching occurs, the clock source equipment is switched into the currently locked clock source equipment, and therefore, the synchronization accuracy of the time and frequency during switching can be ensured to the maximum extent, the switching speed of the clock source equipment is accelerated and switching performance is enhanced.

Description

technical field [0001] The invention relates to a 1588 clock synchronization protocol, in particular to a clock synchronization method and device. Background technique [0002] Precision Time Protocol (Precision Time Protocol, PTP) IEEE STD1588 is one of the important technologies in the field of time and frequency synchronization control. The 1588 protocol stipulates that the slave clock device simultaneously records five effective clock source devices as alternative sources. The best preferred source is selected by the best clock algorithm (Best Master Clock Algorithm, BMC) as the main clock source of the current system, and the slave clock device performs protocol interaction with the preferred source, calculates the time and frequency deviation and corrects the slave The time and frequency of the clock device. When the preferred source fails, switch to the sub-priority source calculated by the BMC algorithm among the alternative sources, and then restart the protocol i...

AI Technical Summary

Problems solved by technology

[0003] In the actual network application, there are the following problems: when the slave clock device follows the preferred source according to the protocol, it needs to accumulate PDV (network delay jitter) change data for a period of time in order to correctly calculate and filter the PDV of the current link

[0004] During the period from link switching to re-locking the clock source, the time and frequency jitter output from the clock device has a larger deviation than that in the locking case, and the frequency and time synchronization performance is poor.

Images