Integrated circuit element, forming method thereof and packaging assembly

Abstract

The invention provides an L-shaped sidewall protection structure formed of a non-metal material on the Cu pillar sidewall to prevent the Cu pillar sidewall from oxidation and increase adhesion between the Cu pillar sidewall and a subsequently formed underfill material. Compared with the conventional immersion Sn method followed by an annealing process, the non-metal sidewall protection structure can adjust substrate stress, prevent solder wetting to the Cu pillar around the perimeter of the UBM layer during the reflow process, and eliminate blue tape residue. This is applicable to fine pitch bump schemes. An L-shaped sidewall protection process is used for Cu pillar bump technology. The L-shaped sidewall protection structure is formed of at least one of non-metal material layers, for example a dielectric material layer, a polymer material layer or combinations thereof.

Description

technical field [0001] This invention relates to the manufacture of integrated circuits, and more particularly to bump structures in integrated circuit components. Background technique [0002] Modern integrated circuits are formed of millions of active components, such as transistors and capacitors, that are initially isolated from each other but are later connected together to form a functional circuit. A typical interconnection structure includes horizontal interconnections, such as metal lines (wires), and vertical interconnections, such as vias and contacts. Interconnects are increasingly limiting the density and performance of modern integrated circuits. decisive. Bond pads will be formed on the top of the interconnect structure, and the bond pads will be exposed on the surface of individual chips. Through the bond pads, an electrical connection can be formed to connect the chip to the package substrate or other chips. Bonding Pads can be used for wire bonding or fli...

AI Technical Summary

Problems solved by technology

Therefore, a sidewall protection layer is required to avoid copper oxidation, but traditional methods of treating the sidewall of copper pillars suffer from higher manufacturing costs and interfacial delamination issues

At present, the chemical immersion tin process (immersion tin process) is used to provide a tin layer on the sidewall of the copper pillar, but there are still problems of manufacturing cost, adhesion between tin and underfill, and solder wetting to the sidewall. It is a challenge for the fine-pitch packaging technology of the new generation of chips

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