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Method of manufacturing semiconductor device

A manufacturing method and semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc., can solve the problems of unable to prevent abnormal growth 13, unable to prevent the formation of oxides 12 or abnormal growth 13 and so on

Inactive Publication Date: 2011-10-05
RENESAS ELECTRONICS CORP
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  • Abstract
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Problems solved by technology

However, in this method, the formation of oxide 12 or the generation of abnormal growth 13 as described above cannot be prevented.
In this method, similar to the technique disclosed in Japanese Unexamined Patent Publication No. 2009-111214, since Ni located on the element isolation insulating film or the side wall flows or diffuses into silicon during the first heat treatment, abnormal growth cannot be prevented 13 generation

Method used

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  • Method of manufacturing semiconductor device
  • Method of manufacturing semiconductor device
  • Method of manufacturing semiconductor device

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no. 2 example

[0075] Figure 5A with 5B to Figure 7A with 7B is a process cross-sectional view showing an example of the manufacturing process of the semiconductor device 100 according to this embodiment.

[0076] First, using a well-known method, it is fabricated by forming STI 102 serving as an element isolation insulating film, gate electrode 103, side walls 104, gate insulating film 105, extension region 106, and source / drain region 107 on a silicon substrate 101. semiconductor components. Meanwhile, the source / drain regions 107 may be formed of materials such as SiGe and SiC. Next, a liner insulating film 120 and an interlayer insulating layer 122 are formed on the entire surface of the silicon substrate 101, and the insulating film is planarized by a chemical mechanical polishing (CMP) method ( Figure 5A ). In this embodiment, the gate electrode 103 may be formed of a metal material, for example.

[0077] Subsequently, using a photolithography technique and a reactive ion etc...

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Abstract

The invention relates to a method of manufacturing semiconductor device. The method comprises forming a metal film over silicon regions and insulating films; performing a first heat treatment under an oxygen atmosphere containing oxygen as a main ingredient, to form a first silicide film in the silicon region by reacting the metal film and the silicon region, and to simultaneously form a metal oxide by oxidizing the entire surface of the metal film from the surface side thereof; and selectively removing the metal oxide and the unreacted metal film using a chemical.

Description

[0001] This application is based on Japanese Patent Application No. 2010-074594, the contents of which are incorporated herein by reference. technical field [0002] The present invention relates to a manufacturing method of a semiconductor device, and more particularly, to a manufacturing method of a semiconductor device including a step of forming a silicide film. Background technique [0003] With the development of highly integrated semiconductor elements, it is required to miniaturize the gate size of transistors or their interconnection widths, and to reduce the resistance of gate and source / drain regions for high-speed operation of transistors. As a technique for addressing this demand, a salicide process is used in which the resistance of gate and source / drain regions made of polysilicon is reduced by forming a low-resistance silicide compound of metal and silicon in a self-aligned manner. [0004] In the salicide process, metals such as Ni, Co, and Ti are formed on ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/324H01L21/336
CPCH01L21/76814H01L21/28052H01L29/41725H01L29/665H01L21/28518H01L2221/1063
Inventor 利根川丘森田朋岳松坂则彦
Owner RENESAS ELECTRONICS CORP
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