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High-function circular buffer and cache system and control method thereof

A ring buffer and cache system technology, applied in the field of cache, can solve the problem of not meeting the requirements of USB3.0 bandwidth, and achieve the effect of being beneficial to the wiring of the back-end circuit of the chip, compact and compact, and reducing power consumption

Active Publication Date: 2011-09-14
谱瑞科技股份有限公司
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AI Technical Summary

Problems solved by technology

For a USB 3.0 controller that is 10 times faster than prior art USB 2.0 technology, this approach cannot meet the bandwidth requirements of USB 3.0

Method used

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  • High-function circular buffer and cache system and control method thereof
  • High-function circular buffer and cache system and control method thereof
  • High-function circular buffer and cache system and control method thereof

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Embodiment Construction

[0027] The specific embodiments of the present invention will be described below in conjunction with the accompanying drawings.

[0028] The invention discloses a ring buffer cache system and a control method thereof, which are mainly applied to a USB3.0 host controller. The USB3.0 master controller can be an independent chip configured on the motherboard of a computer or digital TV to provide a USB3.0 host port or integrated in various system chips that require a USB3.0 master port, and can be connected to various Different USB3.0 applications, such as U disk, external hard disk, etc., when the USB3.0 ports are insufficient, multiple USB3.0 ports can be expanded through an external hub. The caching mechanism is mainly used to improve the function of the scatter-and-gather direct memory access DMA (Direct Memory Access, direct memory access) engine. TRB (Transmit Ring Buffer) refers specifically to the ring buffer at the sending end, which describes the data block of the USB ...

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Abstract

The invention provides a high-function circular buffer and cache system and a control method thereof. The system comprises a transfer management module, and a content related management module and a content storage which are in two-way circuit connection with the transfer management module respectively, wherein a DMA engine module and a host control interface are also in two-way circuit external connection with the transfer management module. The system enables the bit information of TRB to be cached in a local buffer zone in a compact way, the DMA engine does not need to obtain the TRB of each data packet about to move in the main memory, the chip is available to memory access directly, and the information required by DMA can be obtained in a shorter period; the system meets the requirements on USB3.0 bandwidth, is small and compact in volume, not only reduces power consumption and chip area, but also is more beneficial to the wiring of the back-end of the chip.

Description

technical field [0001] The invention relates to a cache technology used in the field of high-speed transmission, in particular to a high-function ring buffer cache system and a control method thereof. Background technique [0002] USB3.0 is the next generation of ultra-high-speed USB transmission technology. The transmission rate is about 5Gbps, and the theoretical maximum rate is 4.8Gbps, which is 10 times the transmission rate of the existing USB2.0. The DMA engine used in the USB2.0 controller generally adopts flow control, and uses the flow control method to try or retry according to the requirements of the USB2.0 transaction transfer device. For regular traffic dispatched to USB transaction converters, dispatch schedules are determined in advance according to a set of rules, rather than running in real time. For the USB3.0 controller which is 10 times faster than the prior art USB2.0 technology, this method cannot meet the bandwidth requirement of USB3.0. Contents of...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/28
CPCY02B60/1228Y02B60/1235Y02D10/00
Inventor 张劲帆倪洁
Owner 谱瑞科技股份有限公司
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