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Method for improving satellite borne DSP (Digital Signal Processing) loading guiding reliability

A reliable, spaceborne technology, applied in instruments, electrical digital data processing, computers, etc., can solve problems such as high loading time requirements, increased hardware overhead, and inappropriateness, to reduce development time and development costs, The effect of reducing hardware redundancy and miniaturization

Inactive Publication Date: 2011-05-04
ZHEJIANG UNIV
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Problems solved by technology

Most of the commonly used anti-single event locking and flipping methods use hardware methods, such as increasing device redundancy and applying error detection and correction circuits (EDAC, Error Detection and Correction), etc. These measures will increase additional hardware overhead, which tends to be small It is not very suitable for micro-satellites with low power consumption and
In addition, there are some software measures, such as data result comparison, two-out-of-three voting, etc. These measures have little or no additional hardware overhead, but almost none of them are used to improve the reliability of DSP bootloading. This is Because the bootloading of the DSP has high requirements for real-time performance and loading time in order to ensure the smooth operation of the system, and these software measures require additional voting time

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  • Method for improving satellite borne DSP (Digital Signal Processing) loading guiding reliability
  • Method for improving satellite borne DSP (Digital Signal Processing) loading guiding reliability
  • Method for improving satellite borne DSP (Digital Signal Processing) loading guiding reliability

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Embodiment Construction

[0030] The present invention provides a scheme for improving the reliability of on-board DSP bootloading. The system consists of DSP, Complex Programmable Logic Device (CPLD, Complex Programmable Logic Device) and Electrically Erasable Programmable Read-Only Memory (EEPROM, Electrically Erasable Programmable Read- Only Memory) is composed of three parts connected in sequence. The bootloading method adopted is 8-bit serial EEPROM bootloading mode, and the serial interface is SPI; CPLD is used to vote two out of three to load the code, so as to ensure the reliability of the program loaded from EEPROM to DSP. The specific connection is shown in Figure 1 .

[0031] As the object to be loaded, DSP sends the EEPROM read command and receives the loaded data after two out of three votes; among them, McBSP2 of the DSP reads the loaded data from the serial EEPROM in the clock stop mode (SPI). If the DSP does not enter the host interface HPI bootloader mode, the bootloader will judge wh...

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Abstract

The invention discloses a method for improving satellite borne DSP (Digital Signal Processing) loading guiding reliability. The guiding loading mode adopted by DSP (Digital Signal Processing) is 8-bit serial EEPROM (Electrically Erasable Programmable Read-Only Memory) loading mode, CPLD (Complex Programmable Logic Device) is adopted to carry out two-from-three voting for the loading data, and the satellite borne DSP loading reliability is improved. Identical loading data stored in three stages of address space, i.e. 00_0000H-00_FFFFH, 01_0000H-01_FFFFH and 10_0000H-10_FFFFH of EEPROM, CPLD is communicated with DSP and EEPROM by realizing SPI (Single Program Initiation) communication protocol, and carries out two-from-three voting for the data on the three stages of different addresses in the EEPROM, and the reliability loading of DSP is realized. After the DSP loading is finished, the CPLD can realize numerical switch function, so that the DSP pin can be extended for other usages, and the utilization rate of satellite borne resource is improved.

Description

technical field [0001] The invention relates to the technical field of bootloading of a digital signal processor (DSP, Digital Signal Processing), in particular to a method for improving the reliability of bootloading of a DSP suitable for micro-satellites. Background technique [0002] With the development of micro-satellite technology, spaceborne devices are developing in the direction of miniaturization, multi-function and low power consumption. The digital signal processor DSP has the characteristics of high computing speed, optimized central processing unit (CPU, Center Process Unit) structure, and low power consumption, and is especially suitable for the development of real-time embedded systems (such as satellite attitude control systems). In the development of DSP system, the guide loading of DSP system is an extremely important part. There are often many ways to bootload DSP. The function of bootloading is to load the code from off-chip to the program area when the...

Claims

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Application Information

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IPC IPC(8): G06F15/177
Inventor 朱小丰王昊郑伟金仲和
Owner ZHEJIANG UNIV
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