DRAM (Dynamic Random Access Memory) structure with extended groove and making method thereof

Abstract

The invention discloses a DRAM (Dynamic Random Access Memory) structure with an extended groove and a making method thereof. The structure comprises a PMOS (P-channel Metal Oxide Semiconductor) transistor and a groove capacitor which is connected with a source electrode of the PMOS transistor; the groove capacitor comprises a semiconductor substrate, alternatively arrayed P-type SiGe layers and P-type Si layers, a groove, a dielectric layer and a polysilicon layer, wherein the groove is positioned in the alternatively-arrayed P-type SiGe layers and P-type Si layers and inserted into the semiconductor substrate, the profile of the alternatively-arrayed P-type SiGe layers and P-type Si layers is in a shape of comb teeth, and the alternatively-arrayed P-type SiGe layers and P-type Si layers are used as a lower pole plate of the groove capacitor; the dielectric layer is positioned on the surface of the inner wall of the groove; the polysilicon layer is filled in the groove and used as an upper pole plate of the groove capacitor; an N-type Si layer is also prepared on the alternatively-arrayed P-type SiGe layers and P-type Si layers; and the PMOS transistor is made on the N-type Si layer. In the invention, the P-type SiGe layers and the P-type Si layers alternatively grow by adopting a doping and epitaxial technology, and the comb-tooth-shaped lateral wall is made by adopting selective etching, therefore, the structure of the deep groove type capacitor in a DRAM is improved, and the making process is simplified.

Description

technical field [0001] The invention relates to a dynamic random access memory (DRAM, Dynamic Random Access Memory) unit structure and a manufacturing process thereof, in particular to a DRAM unit structure with extended grooves and a manufacturing process thereof, belonging to the technical field of semiconductor manufacturing. Background technique [0002] Currently, the industry generally adopts a 1T1C (one transistor with one capacitor) structure as a DRAM unit. This combination of 1T1C components makes the storage bit of DRAM the electronic component with the highest density and the lowest unit manufacturing cost, and has an irreplaceable position in computer access devices. With the rapid development of semiconductor technology, DRAM components are rapidly developing towards high density and high capacity. How to design a capacitor with equivalent capacitance while the area of ​​the unit element is continuously reduced is one of the most important challenges in DRAM t...

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Problems solved by technology

[0004] However, the deep trench capacitors in this kind of DRAM still face many difficulties in the process: (1) In order to meet the capacitance requirements, the groove depth is required to be very deep, that is, there is a high aspect ratio etching requirement, and there will be The etch rate decline effect (lag effect), so the requirements for the etching process are very high; (2) The lower plate of the capacitor adopts the buried substrate (BP, Buried Plate) process, which is complex and difficult; (3) In order to meet the capacitance requirements, the dielectric layer is required to be very thin, which has the risk of increased leakage and affects the yield

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