Method for filling silicon through holes by using carbon nanotube clusters

Abstract

The invention discloses a method for filling silicon through holes by using carbon nanotube clusters in microelectronic packaging. The method comprises the following steps of: making holes in specific shapes and management on a silicone chip by using photoetching technology and deep reactive ion etching technology; depositing a catalyst layer consisting of aluminium oxide and iron on the bottoms of the holes; under the conditions of certain gas flow and temperature, growing the carbon nanotube clusters from the bottoms of the holes; sputtering a support layer consisting of silicon and a photoresist on the upper surface of the silicon chip and the surfaces of the carbon nanotube clusters; grinding by using grinding and chemical mechanical planarization methods to obtain flat and neat surfaces of the carbon nanotube clusters and surface of the silicon chip; plating a titanium / gold metal film serving as a pad on the surfaces of the carbon nanotube clusters; removing the silicon on the back of the silicon chip until the bottoms of the carbon nanotube clusters are exposed; and finally, plating a titanium / gold metal film on the back of the silicon chip to obtain the silicon through holes filled with the carbon nanotube clusters. Through the method, the silicon through holes with the pore diameter of about 20 micrometers can be obtained, and the requirements on density and miniaturization of electronic devices in the future are met.

Description

technical field [0001] The invention relates to an interconnection technology for microelectronic packaging, which is mainly applied to the packaging form of three-dimensional stacked chips. Specifically, it is a method of filling through-silicon holes with carbon nanotube clusters. Background technique [0002] For decades, the general trend in the development of electronic products has been to achieve greater speed and more functions in ever-shrinking product sizes. This is mainly achieved in two ways. One is to continuously integrate more transistors on the chip to increase the computing speed, increase the storage space, and realize more functions. According to the famous "Moore's Law", the number of transistors that can be integrated on a chip with the same area doubles every eighteen to twenty-four months. The second is to integrate more devices in products through various high-density packaging technologies. In recent years, it has become increasingly difficult to...

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Problems solved by technology

In recent years, it has become increasingly difficult to increase the number of transistors on a chip at the rate described by Moore's Law due to the constraints of fundamental physical laws

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