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Method, system and target device for boundary scan experiment

A technology of boundary scan and target device, which is applied in the direction of electronic circuit testing, instruments, teaching models, etc., can solve the problems of inconvenience for beginners and complex test structure of boundary scan technology, and achieve the effect of saving hardware expenses

Inactive Publication Date: 2010-09-01
徐磊 +2
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

[0003] However, due to the relatively complex test structure of boundary scan technology, the generation of test vectors and the analysis of test responses are relatively complicated to grasp, and in practical applications, testers are required to have considerable hardware and software foundations; on the other hand, in addition to boundary scan related In addition to technical standards, there is no learning and experimental device specifically for boundary scan technology on the market, causing inconvenience to beginners

Method used

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  • Method, system and target device for boundary scan experiment
  • Method, system and target device for boundary scan experiment
  • Method, system and target device for boundary scan experiment

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Embodiment Construction

[0018] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0019] Such as figure 1 As shown, the boundary scan experimental method of the specific embodiment of the present invention comprises: obtain boundary scan test program (step S101); Generate test bus signal (step S102) according to the function and timing of boundary scan test program; Test bus signal is passed through test access Port TAP is input in the boundary scan test chain (step S103) that is connected with gate switch, boundary scan BS chip and chip un...

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Abstract

The invention provides a method, a system and a target device for boundary scan experiment. The test target device comprises a TAP input end, a BS chip slot, a slot for a chip to be tested an a TAP output end, wherein the TAP input end is used for receiving externally input TAP test bus signals; the BS chip slot is connected with the TAP input end and is used for bearing a BS chip; the slot for the chip to be tested is connected with the BS chip slot through a jumper switch and is used for bearing the chip to be tested; and the TAP output end is connected with the BS chip slot and is used forfeeding back test signals to an external TAP. The invention provides an experiment platform for learning and practicing to learners of the boundary scan technique, and can provide experiment of multiple test patterns based on all the boundary scan test standards.

Description

technical field [0001] The present invention relates to the technical field of boundary scan testing, in particular to the boundary scan testing experimental technology used for teaching and training, specifically a boundary scanning experimental method, system and target device. Background technique [0002] Boundary-scan technology is a testable design technology. Its basic idea is to add serially connected register units on the pins of the chip to achieve controllability and observability of signals. Boundary-scan testing is one of the most effective testing methods in electronic circuit testing at present. It has been paid more and more attention and applied widely, and has become a must-learn and master content for many test engineers and related learners. [0003] However, due to the relatively complex test structure of the boundary scan technology, the generation of test vectors and the analysis of the test response are relatively complicated to master. In practical a...

Claims

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Application Information

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IPC IPC(8): G01R31/28G09B23/18
Inventor 徐磊陈圣俭王月芳
Owner 徐磊
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