Dual scanning line pixel array substrate

Abstract

The invention provides a dual scanning line pixel array substrate, which comprises a substrate, a first conductive layer, a grid insulation layer, a semiconductor layer, a second conductive layer, a protective layer and a transparent electrode layer. The first conductive layer consists of a plurality of grids and a plurality of scanning lines. The grid insulation layer is covered on the first conductive layer. The semiconductor layer is arranged on the grid insulation layer; the semiconductor layer consists of a plurality of channel areas, a plurality of first common wires and a plurality of capacitance electrodes; and the first common wires are crossed with the scanning lines and connected with the capacitance electrodes. The second conductive layer is arranged on a part of the semiconductor layer and the grid insulation layer and consists of a plurality of sources, a plurality of drains and a plurality of data wires, wherein the first common wires are parallel to the data wires. The transparent electrode layer is electrically connected with each drain through each contact window of the protective layer; and the transparent electrode layer is overlapped with the protective layer and the capacitance electrodes of the semiconductor layer to form a storage capacitor.

Description

【Technical field】 [0001] The present invention relates to a display array substrate, and in particular to a dual scanning line pixel array substrate. 【Background technique】 [0002] With the development of large-sized display panels, among the pixel array structures of current liquid crystal display panels, there is a structure called half source driving (HSD for short). The HSD architecture can halve the number of data lines, so the price of the source driver will be relatively reduced. More specifically, in the pixel array of the HSD architecture, two adjacent sub-pixels share one data line, thereby reducing the number of data lines by half. [0003] Although the display panel adopting the HSD architecture can halve the number of driving channels of the source driver, since the odd and even pixels in the same column of pixels are connected to different scanning lines, the number of scanning lines in the HSD architecture is doubled. , so the pixel array substrate of the H...

AI Technical Summary

Problems solved by technology

In this way, in the pixel array of HSD architecture, in order to maintain the same frame frequency, halving the source driver will cause the recovery time of each pixel voltage level to be halved

Specifically, in the pixel array of the HSD structure, the common electrode used to transmit the common voltage (common voltage, Vcom) is doubled due to the relationship between the scanning line, so that the recovery time after being coupled is only half of that of the general structure, so it is easy to Generate cross-talk, which affects the display quality of the overall picture

Images