Semiconductor device, n-type MOS transistor and manufacturing method thereof

Abstract

The invention relates to a semiconductor device, an n-type MOS transistor and a manufacturing method thereof. The semiconductor device comprises a semiconductor substrate, a grid medium layer, a grid electrode, side walls, a light doping source / drain region, a heavy doping source / drain region, and a fluorine ion implantation region, wherein the gird medium layer, the grid electrode and the side wall are positioned inside an input / output device region of the semiconductor substrate; the low doping source / drain region and the heavy doping source / drain region are positioned inside semiconductor substrates in an n-type MOS transistor region and a p-type MOS transistor region of the input / output device region; and the fluorine ion implantation region is positioned inside a semiconductor substrate in the n-type MOS transistor region of the input / output device region. Correspondingly, the invention also provides a method for manufacturing the semiconductor device, the n-type MOS transistor and the method for manufacturing the n-type MOS transistor. The fluorine ion implantation region is formed in the low doping source / drain region of the n-type MOS transistor region, and fluorine ions in the fluorine ion implantation region and silicon in the semiconductor substrate form fluorine-silicon groups so as to prevent the formation of charge traps, prevent the aggregation of charges in the low doping source / drain region under the condition of additional voltage, and forming hot carrier effect.

Description

technical field [0001] The invention relates to the field of semiconductor technology, in particular to a semiconductor device, an n-type MOS transistor and a manufacturing method thereof. Background technique [0002] With the shrinking of the channel length of semiconductor devices, in order to obtain the required driving current and suppress the short channel effect, the semiconductor substrate and the source / drain are usually doped with a higher concentration, so that the depletion of the source / drain area generates a high electric field. When the high-voltage input / output device operates in a saturated current state, the inversion layer charges are accelerated under the action of the lateral electric field on the channel surface and collide with the crystal lattice to generate a large number of hot carriers (electron-hole pairs) . Hot electrons and hot holes can be emitted to the gate oxide layer across the interface barrier, forming hot-carrier injection (HCI). The ...

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Problems solved by technology

However, in the above technologies, as the size of semiconductor devices continues to shrink, for example, in semiconductor devices with a size of 65nm and below, the above technical solutions are not enough to suppress the hot carrier injection effect

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