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Method for manufacturing package structure with reconfigured chip by metal projection

A packaging method and reconfiguration technology, used in semiconductor/solid-state device manufacturing, electrical components, electrical solid-state devices, etc., can solve problems such as increased resistance, inability to align, and package warpage

Active Publication Date: 2009-05-20
CHIPMOS TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

This thinned chip is reconfigured on another substrate, and then multiple chips are formed into a package by injection molding; because the chip is very thin, the package is also very thin, so when the package is detached After the substrate, the stress of the package itself will cause the package to warp, increasing the difficulty of the subsequent cutting process
[0006] In addition, after the wafer is diced, when it is reconfigured on another substrate, because the size of the new substrate is larger than the original size, it will not be aligned in the subsequent ball planting process, and the reliability of the packaging structure will be reduced.
For this reason, the present invention provides a method to form an alignment mark (alignment mark) on the back of the wafer before wafer dicing, which can effectively solve the problems of inability to align and package warpage during ball planting.
[0007] In addition, during the entire packaging process, there will also be a problem that the manufacturing equipment will generate excessive local pressure on the chip during ball planting, which may damage the chip; at the same time, it may also be caused by the material of the ball planting. The resistance value between the pads becomes larger, which affects the performance of the chip and other issues

Method used

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  • Method for manufacturing package structure with reconfigured chip by metal projection
  • Method for manufacturing package structure with reconfigured chip by metal projection
  • Method for manufacturing package structure with reconfigured chip by metal projection

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Embodiment Construction

[0030] In order to further understand the purpose, structure, features, and functions of the present invention, the embodiments are described in detail below in conjunction with the accompanying drawings.

[0031] The direction of the present invention discussed here is a chip reconfiguration packaging method, a method of reconfiguring a plurality of chips on another substrate and then packaging them. In order to provide a thorough understanding of the present invention, detailed steps and components thereof will be set forth in the following description. Obviously, the practice of the invention is not limited to specific details familiar to those skilled in the art of chip stacking. On the other hand, well-known chip formation methods and detailed steps of back-end processes such as chip thinning are not described in detail to avoid unnecessary limitations of the present invention. However, for the preferred embodiments of the present invention, it will be described in detai...

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PUM

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Abstract

The invention relates to an encapsulating structure for rearranging a chip, which comprises a chip, a plurality of patterning metal segments, an encapsulating body, a plurality of conducive poles, a pattering protective layer and a plurality of conductive components, wherein one active surface of the chip is provided with a plurality of welding pads, each of the plurality of the patterning metal segments is electrically connected with the plurality of the welding pads on the active surface of the chip, the plurality of the conducive poles are formed on the plurality of the patterning metal segments, the encapsulating body is used for wrapping five surfaces of the chip and exposing the plurality of the patterning metal segments, the plurality of the conducive poles are formed at the other ends of the plurality of the patterning metal segments, a pattering protective layer is used for wrapping the plurality of the patterning metal segments and exposing one surface of the plurality of the conducive poles as a conductive end point, and the plurality of the conductive components are electrically connected with the surfaces of the exposed plurality of the conducive poles in a mode of array arrangement.

Description

technical field [0001] The invention relates to a chip reconfiguration packaging method, in particular to a manufacturing method using metal bumps in the chip reconfiguration packaging structure. Background technique [0002] Semiconductor technology has developed quite rapidly, so the miniaturized semiconductor chip (Dice) must have diversified functional requirements, so that the semiconductor chip must be configured with more input / output pads (I / O pads) in a small area. O pads), so that the density of metal pins (pins) is also rapidly increased. Therefore, the early lead frame packaging technology is no longer suitable for high-density metal pins; therefore, a ball grid array (BGA) packaging technology has been developed. The ball array package has the advantage of higher density than the lead frame package. In addition, its solder balls are less prone to damage and deformation. [0003] With the popularity of 3C products, such as: mobile phone (Cell Phone), personal d...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/50H01L21/60H01L21/56H01L21/78H01L23/488H01L23/31
CPCH01L24/19H01L24/96H01L24/20H01L21/568H01L2224/12105H01L2224/19H01L2224/20H01L2924/3511
Inventor 黄成棠齐中邦
Owner CHIPMOS TECH INC
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