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Floating grid with multiple layer hetero quantum point structure applicable for memory unit

A storage unit and quantum dot technology, applied in electrical components, transistors, electric solid-state devices, etc., can solve problems such as information storage failure, achieve the effects of eliminating coupling, ensuring stability, and improving storage density

Inactive Publication Date: 2013-03-06
INST OF PHYSICS - CHINESE ACAD OF SCI +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] What the present invention aims to solve is the leakage problem existing in the existing quantum dot floating gate and the information storage failure problem caused by the coupling between quantum dots, so as to provide a memory unit that does not cause leakage phenomenon and information storage failure. Hollow-out multi-layer quantum dot structure floating gate, another important function of the multi-layer quantum dot structure floating gate for memory cells is that it also has radiation resistance

Method used

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  • Floating grid with multiple layer hetero quantum point structure applicable for memory unit
  • Floating grid with multiple layer hetero quantum point structure applicable for memory unit
  • Floating grid with multiple layer hetero quantum point structure applicable for memory unit

Examples

Experimental program
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Effect test

Embodiment 1

[0057] Such as figure 2 with 3 As shown, the memory cell array of the quantum dot structure floating gate multilayer film memory single device is composed of a large number of QADM cells. In a QADM memory cell, it includes a floating gate multilayer film memory cell 9 with hollow quantum dot structure, SOI CMOS transistor TR and a group of wiring, that is, bit line 33, write word line 7, back gate metal lead 101 and ground line GND31 .

[0058] The multilayer film structure in the hollow quantum dot structure floating gate multilayer film memory storage unit is: a lower buffer layer SiN with a thickness of 2nm deposited sequentially on the SOI CMOS oxide gate substrate, and a first layer with a diameter of 5nm Si quantum dots, the first layer filled with dielectric layer SiO with a thickness of 5nm 2 , the interlayer SiO with a thickness of 2 nm 2 , a second layer of Si quantum dots with a diameter of 5nm, a second layer of filled dielectric layer with a thickness of 5nm,...

Embodiment 2

[0070] According to the method in Example 1, a multilayer quantum dot structure floating gate for memory cells is constructed, and its core structure includes: a lower buffer layer SiN with a thickness of 2 nm deposited successively on the SOI CMOS oxide gate substrate, with a diameter of The first layer of GaMnAs dilute magnetic quantum dots is 5nm, and the first layer with a thickness of 5nm is filled with the dielectric layer SiO 2 , the interlayer SiO with a thickness of 2 nm 2 , a second layer of GaMnAs dilute magnetic quantum dots with a diameter of 5nm, a second layer of filled dielectric layer with a thickness of 5nm, and a compound insulating material SiN with a thickness of 10nm.

[0071] The etching shape of the multilayer film structure of the hollow quantum dot structure floating gate multilayer film memory storage unit is: a rectangular ring structure, the short side of the inner ring of the rectangular ring is 100nm, and the short side of the outer ring is 200n...

Embodiment 3

[0074] According to the method in Example 1, a multilayer quantum dot structure floating gate for memory cells is constructed, and its core structure includes: a lower buffer layer SiN with a thickness of 2 nm deposited successively on the SOI CMOS oxide gate substrate, with a diameter of The first layer of LaCuO quantum dots is 5nm, and the first layer of 5nm is filled with the dielectric layer SiO 2 , the interlayer SiO with a thickness of 2 nm 2 , a second layer of LaCuO quantum dots with a diameter of 5nm, a second layer of filled dielectric layer with a thickness of 5nm, and a compound insulating material SiN with a thickness of 10nm.

[0075] The etching shape of the multilayer film structure of the hollow quantum dot structure floating gate multilayer film memory storage unit is: a rectangular ring structure, the short side of the inner ring of the rectangular ring is 100nm, and the short side of the outer ring is 200nm, the ratio of the short side to the long side is ...

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Abstract

The invention relates to a stacked quantum dot structure floating gate which is applicable in a memory cell. The stacked quantum dot structure floating gate comprises a buffer layer at the lower part, and a first quantum dot growth layer, a first filling medium layer, an intermediate layer, a second quantum dot growth layer, a second filing medium layer and a filling protective layer at the top, which are arranged on the buffer layer. The cross section of the stacked quantum dot structure floating gate applied in a memory cell is a rectangular, oval or regular hexagonal loop. The invention further relates to a radioprotective nonvolatile memory and a micro-magnetic sensor, which are based on stacked quantum dots and take above stacked quantum dot structure floating gates as memory cells. The stacked quantum dot structure floating gate, the radioprotective nonvolatile memory and the micro-magnetic sensor which are based on the stacked quantum dot structure floating gates, have radiation resistances and overcome the problems of electricity leakage and data storage failure caused by the coupling of the quantum dots.

Description

technical field [0001] The invention relates to a floating gate with a multilayer quantum dot structure that can be used for a storage unit, and a radiation-resistant nonvolatile memory and a micromagnetic sensor based on the floating gate with a multilayer quantum dot structure. Background technique [0002] From the perspective of the function of solid-state electronic memory, it can be divided into two types: volatile and nonvolatile. The volatile memory represented by dynamic random access memory (DRAM) is widely used in the memory of electronic computers because of its relatively fast speed and low price. However, in this type of memory, with the continuous improvement of the integration level from 512Mbit to 1GBit, the power consumption will increase sharply, thus almost occupying the total power consumption of the computer when it is in standby. On the other hand, due to the volatility of DRAM, whenever the computer is turned on and off, the information in the memory...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/423H01L29/788H01L27/12
Inventor 刘东屏赵静莎麦菈韩秀峰陈坤基
Owner INST OF PHYSICS - CHINESE ACAD OF SCI
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