Semiconductor package structure

Abstract

A semiconductor package structure and a method for manufacturing the same are disclosed. The semiconductor package structure includes a substrate, an interposer (such as a circuitry laminate), a metal layer formed on the interposer, a first chip and a second chip, wherein the interposer is disposed on the substrate and covers at least a portion of an opening of the substrate, thereby defining a space for receiving the first chip, and the second chip is disposed on the metal layer or the interposer. The metal layer is electrically connected to the substrate and grounded. The first chip is electrically connected to the substrate.

Description

Technical field [0001] The present invention relates to a semiconductor packaging structure, in particular to a semiconductor packaging structure with electromagnetic interference (EMI) shielding effect. Background technique [0002] With the increasing demand for miniaturization and high operating speed, semiconductor package structures with multiple semiconductor chips (ie, multi-chip package structures) have become more and more attractive in many electronic devices. The multi-chip package structure can combine the processor, memory (memory, storage medium, memory, memory, etc., hereinafter referred to as memory) and logic chip in a single package structure to connect the printed circuit board The resulting system operation speed limit is minimized. In addition, the multi-chip package structure can also reduce the length of the connection lines between the chips, and can reduce the signal (ie, signal) delay and access time. [0003] However, especially for high-frequency compo...

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Problems solved by technology

However, this prior art must seal the two chips together after the related structures of the two chips are completed, so that the two chips are exposed to the outside for too long, thus increasing the probability of chip damage

In addition, this existing technology will increase the size of the package structure it makes, and it is not easy to meet the requirements of miniaturization

[0004] It can be seen that the above-mentioned existing semiconductor packaging structure obviously still has inconvenience and defects in the use of product structure, and needs to be further improved urgently.

In order to solve the above-mentioned problems, the relevant manufacturers have tried their best to find a solution, but no suitable design has been developed for a long time, and the general products do not have a suitable structure to solve the above-mentioned problems. This is obviously related. The problem that the industry is eager to solve

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