Field effect transistor structure, associated semiconductor storage cell, and corresponding production method
A field-effect transistor and memory cell technology, applied in semiconductor/solid-state device manufacturing, transistors, semiconductor devices, etc., can solve problems such as the influence of memory time, the increase of effective threshold voltage leakage current, and the charging effect caused by high-impedance well connections. Simplifies precise alignment and avoids the effect of body effects
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[0041] figure 2 According to the first specific embodiment of the present invention, a schematic plan view of a semiconductor storage unit device is briefly described; wherein and figure 1 The same component symbols represent the same or corresponding components and film layers, and will not be repeated here.
[0042] In this example, Figure 3 illustrates the along figure 1 The section of the intercept line I-I is essentially the same as figure 2 A corresponding cross-section (not shown) in is the same; however, the well connection doped region WA is not required in specific embodiments of the present invention.
[0043] according to figure 2 , using a groove V to replace the well connection doped region, which is generally required and not beneficial when the packaging density is increased, the groove V is formed in a shallow trench insulation STI, and one of the semiconductor substrates A diode doped region is formed at its bottom region.
[0044] Figure 5 is along t...
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