High Temperature Gate Replacement Process

Abstract

A method for fabricating an integrated circuit device is disclosed. An exemplary method comprises performing a gate replacement process to form a gate structure, wherein the gate replacement process includes an annealing process; after the annealing process, removing portions of a dielectric material layer to form a contact opening, wherein a portion of the substrate is exposed; forming a silicide feature on the exposed portion of the substrate through the contact opening; and filling the contact opening to form a contact to the exposed portion of the substrate.

Description

PRIORITY DATA[0001]This application is a continuation application of U.S. application Ser. No. 12 / 643,279, filed Dec. 21, 2009, which is hereby incorporated by reference in its entirety.BACKGROUND[0002]The semiconductor integrated circuit (IC) industry has experienced rapid growth. In the course of IC evolution, functional density (i.e., the number of interconnected devices per chip area) has generally increased while geometry size (i.e., the smallest component (or line) that can be created using a fabrication process) has decreased. This scaling down process generally provides benefits by increasing production efficiency and lowering associated costs. Such scaling down has also increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed.[0003]The continuing decrease in technology nodes has lead to a desire to replace a conventional polysilicon gate electrode with a metal gate...

AI Technical Summary

Benefits of technology

The patent text describes a method for making semiconductors more efficiently. The method involves replacing a dummy gate with a metal gate, annealing it to adjust its threshold voltage, and then creating a silicide region in the substrate. This results in a more reliable and efficient semiconductor device.

Problems solved by technology

Such scaling down has also increased the complexity of processing and manufacturing ICs and, for these advances to be realized, similar developments in IC processing and manufacturing are needed.

However, there are challenges to implementing such features and processes in conventional fabrication.

As the gate length and spacing between devices decreases, these problems are exacerbated.

For example, conventional gate replacement processes have limited thermal budgets, which limits flexibility in metal gate work function tuning.

The limited thermal budgets can arise because contact features (e.g., silicide regions of source / drain regions) are formed prior to the gate replacement process.

Consequently, if the gate replacement processes employ temperatures exceeding the contact features' thermal budget, such as a high temperature annealing process, the contact features are damaged.

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