Method and system for forming patterns using charged particle beam lithography

Abstract

A method for mask data preparation (MDP) is disclosed, in which a set of shots is determined that will form a pattern on a reticle, where the determination includes calculating the pattern that will be formed on a substrate using an optical lithographic process with a reticle formed using the set of shots. A method for optical proximity correction (OPC) or MDP is also disclosed, in which a preliminary set of charged particle beam shots is generated using a preliminary mask model, and then the shots are modified by calculating both a reticle pattern using a final mask model, and a resulting substrate pattern. A method for OPC is also disclosed, in which an ideal pattern for a photomask is calculated from a desired substrate pattern, where the model used in the calculation includes only optical lithography effects and / or substrate processing effects.

Description

RELATED APPLICATIONS[0001]This application claims priority from U.S. Provisional Patent Application No. 61 / 625,789 filed on Apr. 18, 2012, entitled “Method And System For Forming Patterns Using Charged Particle Beam Lithography,” which is hereby incorporated by reference for all purposes. This application also is related to 1) Fujimura, U.S. patent application Ser. No. ______ (Attorney Docket No. D2SiP041b) entitled “Method and System For Forming Patterns Using Charged Particle Beam Lithography” filed on even date herewith; 2) Fujimura, U.S. patent application Ser. No. ______ (Attorney Docket No. D2SiP041c) entitled “Method and System For Forming Patterns Using Charged Particle Beam Lithography” filed on even date herewith; 3) Pearman, U.S. patent application Ser. No. ______, entitled “Method And System For Critical Dimension Uniformity Using Charged Particle Beam Lithography”, (Attorney Docket No. D2SiP042) filed on even date herewith; and 4) U.S. Patent Publication No. 2013 / 007022...

AI Technical Summary

Benefits of technology

This patent describes methods for preparing mask data and performing optical proximity correction (OPC) to improve the accuracy of patterns formed on a substrate during a lithographic process. The methods involve calculating the pattern on the substrate using a set of charged particle beam shots and considering various factors such as pattern design, reticle writing effects, and substrate processing effects. The techniques described in the patent can improve the accuracy and precision of patterns formed on a substrate and enhance the overall performance of the lithographic process.

Problems solved by technology

An example of an end-use limitation is defining the geometry of a transistor in a way in which it cannot sufficiently operate at the required supply voltage.

The design rule limitations reflect, among other things, the smallest dimensions that can be reliably fabricated.

As the critical dimensions of the circuit pattern become smaller and approach the resolution value of the exposure tool, the accurate transcription of the physical design to the actual circuit pattern developed on the resist layer becomes difficult.

Adding OPC features is a very laborious task, requires costly computation time, and results in more expensive reticles.

Not only are OPC patterns complex, but since optical proximity effects are long range compared to minimum line and space dimensions, the correct OPC patterns in a given location depend significantly on what other geometry is in the neighborhood.

There are numerous manufacturing factors that also cause variations, but the OPC component of that overall error is often in the range listed.

Since these ideal ILT curvilinear patterns are difficult and expensive to form on a reticle using conventional techniques, rectilinear approximations or rectilinearizations of the ideal curvilinear patterns may be used.

The rectilinear approximations decrease accuracy, however, compared to the ideal ILT curvilinear patterns.

In EUV, however, mask accuracy requirements are very high because the patterns on the mask, which are typically 4× the size of the patterns on the wafer, are sufficiently small that they are challenging to form precisely using charged particle beam technology such as electron beam.

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