CMOS compatible method for manufacturing a HEMT device and the HEMT device thereof

Abstract

A method for manufacturing a III-nitride HEMT having a gate electrode and source and drain ohmic contacts is provided, comprising providing a substrate; forming a stack of III-nitride layers on the substrate; forming a first passivation layer comprising silicon nitride overlying and in contact with an upper layer of the stack of III-nitride layers, wherein the first passivation layer is deposited in-situ with the stack of III-nitride layers; forming a dielectric layer overlying and in contact with the first passivation layer; forming a second passivation layer comprising silicon nitride overlying and in contact with the dielectric layer wherein the second passivation layer is deposited at a temperature higher than 450° C. by LPCVD or MOCVD or any equivalent technique; and thereafter forming the source and drain ohmic contacts and the gate electrode.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application claims the benefit under 35 U.S.C. §119(e) of U.S. provisional application Ser. No. 61 / 498,951 filed Jun. 20, 2011 and U.S. provisional application Ser. No. 61 / 526,107 filed Aug. 22, 2011, the disclosures of which are hereby expressly incorporated by reference in their entirety and are hereby expressly made a portion of this application.FIELD OF THE DISCLOSURE[0002]Semiconductor devices are provided. More particularly, a method for manufacturing a high electron mobility transistor (HEMT) device and the HEMT device thereof are provided.BACKGROUND OF THE DISCLOSURE[0003]Gallium-nitride based high electron mobility transistors (HEMTs) have attracted a lot of interest for high-frequency and lately also high-power applications because of their potentials for fast and low-loss switching, high breakdown voltage and high operating temperature.[0004]However, AlGaN / GaN HEMTs with Schottky gates and without passivation suffer from h...

AI Technical Summary

Benefits of technology

[0014]There is provided a method for manufacturing a III-nitride HEMT having a gate electrode and source and drain ohmic contacts, comprising a) providing a substrate; b) forming a stack of III-nitride layers on the substrate; c) forming a first passivation layer comprising silicon nitride, preferably Si3N4, overlying and in contact with an upper layer of the stack of III-nitride layers, wherein preferably the first passivation layer is deposited in-situ with the stack of III-nitride layers; d) forming a dielectric layer overlying and in contact with the first passivation layer; e) forming a second passivation layer comprising silicon nitride, prefer

Problems solved by technology

However, AlGaN / GaN HEMTs with Schottky gates and without passivation suffer from high gate leakage, current dispersion and a variety of reliability issues.

None of the methods referred above is suitable for use in a Si-CMOS compatible scheme.

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