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Synchronization method for a multi-processor system and the apparatus thereof

a multi-processor system and synchronization method technology, applied in the direction of unauthorized memory use protection, multi-programming arrangements, instruments, etc., can solve the problems of data errors proliferation and significant drop in system performance, and achieve the effect of saving a lot of bus bandwidth and memory bandwidth

Inactive Publication Date: 2007-03-01
IND TECH RES INST
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0007] The first objective of the present invention is to provide a synchronous method for a multi-processor system that can save a lot of bus bandwidth and memory bandwidth.
[0008] The second objective of the present invention is to provide a synchronous apparatus for a multi-processor system that does not need an atomic operation to synchronize a plurality of processors, saves electrical power and improves system performance.
[0012] According to the preferred embodiment of the present invention, the processor is temporarily suspended after a request for acquiring a spinlock fails. Then, the operation of the processor is resumed after a waiting period just before the acquisition of the spinlock is successful. During the temporary suspension, it is not necessary for the processor to poll the memory repeatedly to find the state of the spinlock like other prior techniques. Thus, considerable bus bandwidth and memory bandwidth can be saved from the system. Power consumption can be reduced and performance of the system can be improved. Furthermore, the present invention also uses a spinlock controller to manage all spinlock requests from processors in a central location. Hence, the synchronization of a multi-processor system can be achieved without using any atomic operation.
[0013] At present, most portable multi-media electronic products deploy a single chip multi-processor system to provide higher performance with lower power consumption. The present invention is particularly suitable for a single chip multi-processor system because only a few additional logic circuits are required in the single chip system.

Problems solved by technology

If the programs executed on different processors are allowed to modify a shared piece of the data structure, data errors will proliferate.
However, if the acquisition of the spinlock is unsuccessful, the processor will enter into an eternal loop forever inspecting the state of the spinlock constantly.
When a large number of processors are in loops inspecting the spinlock constantly, a lot of bus bandwidth and memory bandwidth are held up, which leads to a significant drop about system performance.

Method used

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  • Synchronization method for a multi-processor system and the apparatus thereof
  • Synchronization method for a multi-processor system and the apparatus thereof
  • Synchronization method for a multi-processor system and the apparatus thereof

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Embodiment Construction

[0019] Reference will now be made in detail to the present preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers are used in the drawings and the description to refer to the same or like parts.

[0020]FIG. 1 is a flowchart showing part of the steps in the multi-processor system synchronous method according to one embodiment of the present invention. As shown in FIG. 1, the flow can be roughly divided into two parts. The steps on the left side of the vertical dash line mainly deals with the acquisition of spinlock by a processor. The steps on the right side of the vertical dash line are at the core of the synchronous method. In other words, the steps on the right side mainly deals with receiving requests for spinlocks and processing those request, the main operations of a synchronous apparatus.

[0021] First, in step 100, a processor attempts to obtain a spinlock. In step 110, the processor ...

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PUM

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Abstract

A synchronous method for a multi-processor system and the apparatus thereof are provided. The method comprises the following steps. First, a request for acquiring a spinlock from a processor is received and then the status of the spinlock is returned to the processor. If the spinlock is in an unlock state, the spinlock is changed to a locked state. If the spinlock is already in the locked state, the clock signal to the processor is suspended so that the processor is suspended and the suspended processor is added to a queue. Then, when a request for releasing the spinlock is received from a processor, the spinlock is changed to the unlocked state. Finally, if there are other processors waiting in the queue, one of the processors is selected from the queue according to a predetermined policy and the clock signal of the selected processor is resumed.

Description

CROSS-REFERENCE TO RELATED APPLICATION [0001] This application claims the priority benefit of Taiwan application serial no. 94129192, filed on Aug. 26, 2005. All disclosure of the Taiwan application is incorporated herein by reference. BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates to a synchronous method and apparatus for a multi-processor system. More particularly, the present invention relates to a synchronous method and an apparatus that use spinlocks. [0004] 2. Description of the Related Art [0005] In a multi-processor system, spinlocks are indispensable means of synchronization. If the programs executed on different processors are allowed to modify a shared piece of the data structure, data errors will proliferate. Through the synchronous mechanism, the processor which successfully acquires the spinlock of a data structure has the authority to modify the shared data structure. In this way, the correctness of the information in...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G06F12/00G06F12/14
CPCG06F9/52
Inventor TUAN, CHENG-MING
Owner IND TECH RES INST
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