Pipelined data relocation and improved chip architectures
a data relocation and chip technology, applied in the field of semiconductor nonvolatile data storage system architectures, can solve the problems of high constant performance penalty of data transfer and verification, high probability of the need to rewrite the entire block with a high penalty in performance and time-out/latency, and the eeprom architecture does not allow independent access to data. , to achieve the effect of accelerating complex data operations, high error rate memories, and high error ra
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[0054] In a first aspect, the present invention describes a data relocation method that allows correction of data errors during garbage collection operations without any penalty to overall performance and time-out / latency in defect tolerant systems, and thus, allows usage of flash memory with higher error rate in performance critical applications. Other aspects are improved flash chip architectures that allows data transfers between controller and flash chip concurrently with read and program operations, thus accelerating complex data operations, like data relocation (garbage collection) and Write-Read Back-Verify, typical for systems with high error rate memory.
[0055] The various aspects of the present invention are applicable to non-volatile memory systems in general. Although the description below, as well as that in the Background, is given mainly in terms of an EEPROM Flash memory embodiment, the particular type of storage unit used in the memory array is not particularly impo...
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