Controlling execution of a block of program instructions within a computer processing system

Abstract

A data processing apparatus and method are disclosed. The data processing apparatus comprises: an instruction fetching circuit operable to fetch a sequence of program instructions from a sequence of memory locations; an instruction decoder responsive to program instructions within the sequence of program instructions fetched by the instruction fetching circuit to control data processing operations specified by the program instructions; and an execution circuit operable under control of the instruction decoder to execute the data processing operations, wherein the instruction decoder is responsive to an execute block instruction within the sequence of program instructions to trigger fetching of a block of two or more program instructions by the instruction fetching circuit and execution of the block of two or more program instructions by the execution circuit, the block of two or more instructions containing a number of program instructions specified by a block length field within the executed block instruction and being stored at a memory location specified by a location field within the execute block instruction, the apparatus further comprises execute block instruction logic operable in response to the execute block instruction to store an indication of a memory location of an instruction following the execute block instruction and to determine which instruction in the block of two or more program instructions is being processed, the execute block instruction logic being further operable when it is determined that a last instruction in the block of two or more program instructions is being processed to provide to the instruction fetching circuit the indication of the memory location of the instruction following the execute block instruction so that the instruction following the execute block instruction is fetched for execution immediately following the last instruction in the block of two or more program instructions. Providing the indication of the memory location of the instruction following the execute block instruction to the instruction fetching circuit causes the fetch unit to fetch that instruction so that the correct sequence of instructions is fetched by the fetch unit which avoids the need to flush instructions.

Description

BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to the field of data processing systems. More particularly, the present invention relates to the control of execution of a block of program instructions within a data processing system. [0003] 2. Description of the Prior Art [0004] It is known that computer programs often contain sequences of program instructions that are frequently repeated within the computer program. In order to produce a computer program with a smaller code size, it is known to arrange such blocks of computer program instructions into functions or subroutines which can be called from various positions within the computer program. [0005] It is normal for such subroutines to terminate with a return instruction which commands the data processing system to return to the instruction immediately following the point in the computer program from where the call to the subroutine was made. When the subroutine or block of inst...

AI Technical Summary

Benefits of technology

The present invention provides a data processing apparatus with an instruction fetching circuit, an instruction decoder, and an execution circuit. The instruction decoder is responsible for controlling data processing operations specified by a sequence of program instructions. The execution circuit is operable to execute the data processing operations. The invention also includes an execute block instruction logic that stores an indication of the memory location of an instruction following the execute block instruction. This logic determines when the execute block instruction is being processed and provides the indication to the instruction fetching circuit to fetch the instruction for execution. The technical effect of this invention is to improve the efficiency of data processing operations by optimizing the fetching of instructions and reducing the need for flushing instructions.

Problems solved by technology

However, it will be appreciated that the last instruction itself would not typically provide an indication of the memory location of the instruction following execute block instruction or contain any information which would normally enable such an indication to be provided.

Also, because the last instruction is typically not an instruction which would normally be interpreted as being encoded as a branch, the likelihood that executing that instruction will result in a branch would not normally ever be considered as a possibility and, hence, the fetch unit would typically assume that it is required to linearly access instructions following the last instruction.

Accordingly, the number of flushes that would need to be performed would also be relatively high, which may have an adverse effect on overall performance.

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