Lithography model for three-dimensional patterning device

Abstract

A computer-implemented method for simulating a scattered radiation field of a patterning device including one or more features, in a lithographic projection apparatus, the method including: determining a scattering function of the patterning device using one or more scattering functions of feature elements of the one or more features; wherein at least one of the one or more features is a three-dimensional feature, or the one or more scattering functions characterize scattering of incident radiation fields at a plurality of incident angles on the feature elements.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application is the U.S. national phase entry of PCT patent application no. PCT / EP2014 / 052109, which was filed on Feb. 4, 2014, which claims the benefit of priority of U.S. provisional application no. 61 / 768,228, which was filed on Feb. 22, 2013, and which is incorporated herein in its entirety by reference.BACKGROUND[0002]A lithographic projection apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In such a case, a patterning device (e.g., a mask) may contain or provide a circuit pattern corresponding to at least a part of an individual layer of the IC (“design layout”), and this circuit pattern can be transferred onto a target portion (e.g. comprising one or more dies) on a substrate (e.g., silicon wafer) that has been coated with a layer of radiation-sensitive material (“resist”), by methods such as irradiating the target portion through the circuit pattern on the patterning device. In general, a s...

AI Technical Summary

Benefits of technology

The patent text discusses the use of model-based optical proximity correction (OPC) in the design of semiconductor chips. However, there are millions of features in a chip design, and applying OPC is an iterative process that does not always compensate for all possible proximity effects. Therefore, to minimize design flaws, intensive full-chip simulation needs to be performed using calibrated numerical process models. This is important because it helps improve the patterning device used in the process. The patent also mentions the optimization of the illumination source used in the lithography process. While off-axis illumination sources can provide better imaging results, they usually provide less radiation intensity. There is a need to optimize the source to achieve the optimal balance between finer resolution and reduced radiation intensity. Additionally, with advances in technology, the design rules have become more challenging, which requires litho-friendly design and optimization of the mask to ensure a workable process window for the production of circuit designs on the substrate.

Problems solved by technology

However, applying OPC is generally not an “exact science”, but an empirical, iterative process that does not always compensate for all possible proximity effect.

This is driven by the enormous cost of making high-end patterning devices, which run in the multi-million dollar range, as well as by the impact on turn-around time by reworking or repairing actual patterning devices once they have been manufactured.

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