Semiconductor metal capacitor

Abstract

The disclosed semiconductor alloy capacitance includes cascaded type capacitance structure in filling medium. The structure includes low metal plate, dielectric layer, middle metal plate, another dielectric layer, and up metal plate in sequence from lower to upper. Through metal through hole, the middle metal plate is connected to an output electrode. The up metal plate and low metal plate are connected to the metal through hole and the other output electrode. Stacking metal layers and dielectric layers, the invention increases front opposite acreage between metal electrodes so as to raise specific capacitance density of metal capacitance, and performance of semiconductor device.

Description

technical field [0001] The invention relates to a capacitor, especially a metal capacitor used for semiconductor devices. Background technique [0002] In the current CMOS / Bi CMOS integrated circuit technology, the MiM (Metal Insulator Metal) metal capacitor structure has been widely used. As shown in Figure 1, the device uses the Metal (metal layer) used for wiring as the lower plate 11, and adds a layer of metal 12 as another plate in the Metal interlayer dielectric, and the middle capacitive insulating medium 13 To form a metal capacitor, the two plates are respectively connected to the two output electrodes 15 by two through holes 14 filled with metal material passing through the filling medium IMD. Due to the limitation of breakdown voltage and process capability, the thickness of the capacitor insulating medium 13 can only be thinned to a certain extent, so that the unit capacitance density of the metal capacitor in the integrated circuit process is limited. [0003]...

AI Technical Summary

Problems solved by technology

However, this structure requires multiple filling dielectric IMD layers and multiple metal layers. Although the performance of the capacitor is improved, the complexity of the semiconductor device is increased, so the effect is still unsatisfactory.

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