Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Method for keeping optical etcher high speed synchronous control time sequence signal completeness

A signal integrity, high-speed synchronization technology, used in microlithography exposure equipment, photolithography process exposure devices, etc., to improve real-time process control, improve production efficiency, and improve reliability.

Active Publication Date: 2006-11-08
SHANGHAI MICRO ELECTRONICS EQUIP (GRP) CO LTD
View PDF0 Cites 9 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] (1) Scanning must be done within the same time period for all involved submodules

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Method for keeping optical etcher high speed synchronous control time sequence signal completeness
  • Method for keeping optical etcher high speed synchronous control time sequence signal completeness
  • Method for keeping optical etcher high speed synchronous control time sequence signal completeness

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0034] The invention is a method for maintaining the integrity of the high-speed synchronous control timing signal of a lithography machine, and realizes the synchronous signal control of the exposure scan of a step-scan projection lithography machine. The present invention uses synchronous bus data transmission as a time reference, and strictly controls the time points of each signal through the minimum time unit of the synchronous bus, thereby realizing real-time and synchronization of signals between sub-modules.

[0035] The synchronous bus controller is the core controller of the synchronous control of the step-scan projection lithography machine. After all subsystems participating in the synchronous scanning process are negotiated under the exposure control software, the synchronous bus controller implements real-time synchronous control on the hardware of the entire scanning process.

[0036] The structural block diagram of the synchronous control process is as follows:...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

This invention discloses a method for maintaining the integrality of high speed synchronous control time sequence signals of an aligner, in which, a synchronous bus controller ensures the impedance control of high speed signals in lamination, besides, a supply plane of the bus controller is adjacent to the ground in lamination to form a plate condenser and the signal layer is adjacent to the ground, which realizes synchronous signal control to the exposing scanning to a step projecting aligner and takes the synchronous bus data transmission as the primary standard of time to strictly control the time point of each signal with its minimum time unit so as to realize real time and synchronization among signals of sub-modules.

Description

technical field [0001] The present invention is a method for maintaining the integrity of the high-speed synchronous control timing signal of a lithography machine, and relates to the realization process of a synchronous control signal of a step-scan projection lithography machine, and furthermore, relates to the synchronous control of a step-scan projection lithography machine The implementation process of the bus-centered synchronous control signal, and the synchronous coordination process between the sub-modules controlled and constrained by the synchronous control signal. Background technique [0002] Lithography machine is the most critical equipment in the process of integrated circuit processing. Foreign countries have proposed the concept of next-generation lithography many years ago, and have conducted a lot of research on technologies such as extreme ultraviolet lithography, electron beam projection lithography, and ion beam projection lithography. For many reason...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G03F7/20
Inventor 吴仁玉郑涛池峰陈勇辉韦学志
Owner SHANGHAI MICRO ELECTRONICS EQUIP (GRP) CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com