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'One space parallel' high-activity matrix mnltiplier

A matrix multiplier, matrix technology

Inactive Publication Date: 2005-01-05
FUDAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0025] For large-scale concurrent operations, such a structure is too wasteful of resources

Method used

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  • 'One space parallel' high-activity matrix mnltiplier
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  • 'One space parallel' high-activity matrix mnltiplier

Examples

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Embodiment Construction

[0064] The present invention is further illustrated below by specific examples:

[0065] right Figure 6 The shown multiplier structure performs a single clock beat test, and a specific data flow diagram can be obtained. The input data flow of the most basic Kung-Leiserson matrix multiplier appears in the data input end of the multiplication unit in sequence along the direction of the oblique line; while the input data of the "one-interval parallel" high-efficiency matrix multiplier appears simultaneously in several of the following ( Figure 6 ). The additional shift unit temporarily stores the input data for a time beat, and then sends it to the adjacent multiplication unit to ensure that the parallel operation can be performed normally.

[0066] By comparing with the original results, the corresponding efficiency and drive tables can be obtained. It can be seen from the table that the efficiency of the "one-interval parallel" high-efficiency matrix multiplier is 166.67%...

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PUM

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Abstract

The invention is a 'two parallel intervals' high efficient matrix multiplier. It is based on basic Kung-Leiserson matrix multiplication, it compresses the intervals between each layer of data, then redesigns the connecting mode and data inputting of each multiplication unit, and increase two additional calculating units (shifting units), in order to realize the correct function of the multiplier, thus acquires the multiplier with high efficiency, the using rate of the multiplication unit can reach above 90%, the calculating speed is faster then the Kung-Leiserson multiplier.

Description

technical field [0001] The invention belongs to the field of electronic technology, and in particular relates to a high-efficiency matrix multiplier with a "one-interval parallel" structure. technical background [0002] Concurrent computing (Concurrent) is a very important aspect in the design of modern computer systems. It mainly refers to a large number of calculations performed at the same time. It is a special form of parallel computing. It is widely used in DSP design, computer architecture realization and so on. [0003] Generally, we use processor arrays to realize concurrent operations, specifically through regularly arranged VLSI chips, to realize vector and matrix operations, and then to realize various actual concurrent operations [4]. [0004] Among the various arrangement rules, the realization of the matrix multiplier is the most important, and all kinds of vectors can be regarded as special matrices. Therefore, designing an efficient and fast matrix multipl...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F7/52
Inventor 杨贇赵文庆
Owner FUDAN UNIV
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