Vertically-arranged MSM capacitor structure and manufacturing method thereof

Abstract

The vertically-arranged MSM capacitor structure and the manufacturing method thereof disclosed by the invention can be applied to various semiconductor integration / packaging structures with small and medium capacitance values and miniaturization requirements. The structure comprises two flat metalized through grooves or blind grooves inserted into a semiconductor dielectric substrate, and the two flat metalized through grooves, blind grooves or buried grooves which are perpendicular to the surface of the semiconductor dielectric substrate and are separated by a dielectric partition wall S1 are formed in specific positions of the semiconductor dielectric substrate. A dielectric partition wall of a vertically-arranged MSM capacitor structure is perpendicular to the upper surface and the lower surface of the semiconductor dielectric substrate to form a dielectric layer of the capacitor. Two parallel rectangular through grooves, blind grooves or buried grooves are embedded with metal electrode plates P1 and P2 which form homoepitaxy of a capacitor body, and the two metal electrode plates extend to two ends of a dielectric partition wall S1 through a metal layer microstrip connecting line etched on the surface of a semiconductor dielectric substrate to form an electrode structure led out from leading-out ends L1 and L2 of the MSM capacitor. Therefore, a vertically-arranged MSM capacitor equivalent circuit structure is formed.

Description

technical field [0001] The invention relates to the fields of microwave technology and wireless communication technology, an embedded integrated three-dimensional flat plate capacitor structure, in particular a representative metal-semiconductor- Metal (MSM), ie MSM=metal-semiconductor-metal vertical capacitor structure, and also relates to a manufacturing method of the MSM capacitor. Background technique [0002] In the current 2D / 2.5D / 3D integrated circuit / package design, capacitors with different capacitance values ​​and packages are widely used in functional links such as decoupling, bypass, DC blocking, resonance, and energy storage. Existing capacitor forms mainly include: 1) electrolytic capacitors, tantalum capacitors, monolithic capacitors, ceramic capacitors, etc. traditionally installed on the surface of the plate or package; 2) small and medium-sized capacitors installed in the cavity for easy interconnection or gold wire bonding Capacitance chip capacitors; 3) ...

AI Technical Summary

Problems solved by technology

However, compared with the extension in the Z direction, the main contradiction of chip or module miniaturization is still concentrated in the XY plane layout

Compared with type 1) capacitor form, although the type 2) and 3) capacitor form can reduce the area occupied by the plane layout to a certain extent in the field of small and medium capacitance applications, and improve the miniaturization performance, the calculation formula of the plate capacitance Limits the size of parallel metal plates / layers, resulting in the inevitable contradiction between capacity expansion and miniaturization

Although the 4th) metal-insulator-metal (MIM) capacitance configuration solves the contradiction between capacity expansion and miniaturization, the preparation and molding of the insulator (I) layer in the MIM structure is bound to be introduced into the integrated three-dimensional integration technology based on semiconductors. Additional Processes and Risks

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