Looking for breakthrough ideas for innovation challenges? Try Patsnap Eureka!

Integrated circuit chip verification method and device, electronic equipment and storage medium

A technology of integrated circuits and verification methods, which is applied in the fields of electrical digital data processing, computer-aided design, instruments, etc., can solve the problems of not providing floating-point data randomization methods, and achieve the effect of improving the verification effect

Active Publication Date: 2022-05-10
BEIJING BAIDU NETCOM SCI & TECH CO LTD
View PDF12 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, mainstream IC verification platforms are usually built based on system verilog. System verilog refers to the SV language, which is a hardware description and verification language. The system verilog platform only provides randomization methods for fixed-point (integer) data. No randomization method provided for floating point data

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Integrated circuit chip verification method and device, electronic equipment and storage medium
  • Integrated circuit chip verification method and device, electronic equipment and storage medium
  • Integrated circuit chip verification method and device, electronic equipment and storage medium

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0031] Exemplary embodiments of the present disclosure are described below in conjunction with the accompanying drawings, which include various details of the embodiments of the present disclosure to facilitate understanding, and they should be regarded as exemplary only. Accordingly, those of ordinary skill in the art will recognize that various changes and modifications of the embodiments described herein can be made without departing from the scope and spirit of the disclosure. Also, descriptions of well-known functions and constructions are omitted in the following description for clarity and conciseness.

[0032] In addition, it should be understood that the term "and / or" in this article is only an association relationship describing associated objects, which means that there may be three relationships, for example, A and / or B may mean: A exists alone, and A exists at the same time. and B, there are three cases of B alone. In addition, the character " / " in this article g...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention provides an integrated circuit chip verification method and device, electronic equipment and a storage medium, and relates to the field of artificial intelligence such as an artificial intelligence chip and cloud computing, and the method comprises the steps: obtaining a first parameter and a second parameter, the first parameter being a required floating-point number value upper limit, and the second parameter being a required floating-point number value lower limit; respectively generating a first sign bit, a first exponential bit and a first decimal bit of the randomized floating-point number according to the first parameter and the second parameter; and generating the floating-point number according to the first sign bit, the first index bit and the first decimal bit, and performing integrated circuit chip verification by using the floating-point number. By means of the scheme, randomization of the floating point data can be achieved, and therefore required floating point data excitation and the like are provided for verification of related arithmetic units in integrated circuit chip verification.

Description

technical field [0001] The present disclosure relates to the field of artificial intelligence technology, and in particular to an integrated circuit chip verification method, device, electronic equipment, and storage medium in the fields of artificial intelligence chips and cloud computing. Background technique [0002] The randomized data stimulus is very important for the verification of an integrated circuit chip (IC, Integrated Circuit), and the chip may be a voice chip or the like. [0003] At present, mainstream IC verification platforms are usually built based on system verilog. System verilog refers to the SV language, which is a hardware description and verification language. The system verilog platform only provides randomization methods for fixed-point (integer) data. No randomization method is provided for floating point data. Contents of the invention [0004] The disclosure provides an integrated circuit chip verification method, device, electronic equipment...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Applications(China)
IPC IPC(8): G06F30/398G06F7/483
CPCG06F30/398G06F7/483G06F30/33G06F30/27G06F21/76
Inventor 李炎
Owner BEIJING BAIDU NETCOM SCI & TECH CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Patsnap Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Patsnap Eureka Blog
Learn More
PatSnap group products