Implementation method of convolutional neural network based on heterogeneous FPGA (Field Programmable Gate Array) and fused with multiple resolutions
A convolutional neural network and multi-resolution technology, which is applied in the field of convolutional neural network based on heterogeneous FPGA platform and fusion multi-resolution, to achieve the effect of improving system performance, high precision, and overcoming low precision
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[0068] refer to figure 1 , is a flow chart of an implementation method based on a heterogeneous FPGA and a fusion multi-resolution convolutional neural network according to an embodiment of the present invention. The specific implementation is as follows:
[0069] Step 1: Convolutional Neural Network (CNN) algorithm model fusion with multi-resolution, the embodiment of the present invention is described by taking YOLO-V2 algorithm fusion with multi-resolution model as an example.
[0070] refer to figure 2 , for the multi-resolution YOLO-V2 improved model - Multi-resolution YOLO-V2 model structure diagram.
[0071] By designing its passthrough structure as a series connection of high and low resolution networks, the recognition ability of the overall network is enhanced. The advantage of this difference from the single use of high-resolution networks is that the high-resolution network is designed as a front-end network with a passthrough structure. The number of layers of...
Embodiment approach
[0109] refer to Figure 4 , is a flow chart of the processing method of the embodiment of the present invention, and the specific implementation is as follows:
[0110] (1) Get image
[0111] The PS side (processing system, ARM) collects rice images through the camera.
[0112] (2) Image preprocessing on the PS side
[0113] First, normalize the image, divide the input RGB image by 256, so that each pixel value is in the interval [0, 1].
[0114] Then the resulting image is converted to a size of 416×416, and the insufficient padding constant is filled with a value of 0.5.
[0115] Store the resulting image in DDR.
[0116] (3) Run high and low resolution networks in parallel
[0117] As the main control unit, the PS side first starts the operation of the high-resolution network after image preprocessing is completed, and then starts the operation of the scaling module and the low-resolution network.
[0118] The low-resolution network is actually formed by the PS side con...
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